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INA317 Datasheet(PDF) 21 Page - Texas Instruments |
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INA317 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 31 page  Use ground pours for shielding the input signal pairs 1 RG 8 RG 2 ±IN 7 +VS 3 +IN 6 OUT 4 -VS 5 REF R1 R2 C1 C2 GND GND +V ±IN +IN OUT Input traces routed adjacent to each other -V R3 Ground plane removed at gain resistor to minimize parasitic capacitance Low-impedance connection for reference terminal Place bypass capacitors as close to IC as possible R3 +IN -IN +V OUT -V Copyright © 2017, Texas Instruments Incorporated R1 R2 C1 C2 RG INA317 RG 21 INA317 www.ti.com SBOS896 – NOVEMBER 2017 Product Folder Links: INA317 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 10.2 Layout Example Figure 40. INA317 Layout |
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