DS1387 datasheet(4/20 Pages) DALLAS

4 / 20 page

DS1385/DS1387

012496 4/20

WR (RTC Write Input) –The WR signal is an active low

signal. The WR signal defines the time period during

which data is written to the addressed clock register.

CS (RTC Chip Select Input) – The Chip Select signal

must be asserted low during a bus cycle for the RTC

portion of the DS1385/DS1387 to be accessed. CS

must be kept in the active state during RD and WR tim-

ing. Bus cycles which take place without asserting CS

will latch addresses but no access will occur.

IRQ (Interrupt Request Output) – The IRQ pin is an

active low output of the DS1385/DS1387 that can be

tied to an interrupt input on a processor. The IRQ output

remains low as long as the status bit causing the inter-

rupt is present and the corresponding interrupt–enable

bit is set. To clear the IRQ pin, the application program

normally reads the C register.

When no interrupt conditions are present, the IRQ level

is in the high impedance state. Multiple interrupting de-

vices can be connected to an IRQ bus. The IRQ bus is

an open drain output and requires an external pull–up

resistor.

AS0 (RAM Address Strobe Zero) – The rising edge of

AS0 latches the lower eight bits of the 4K x 8 RAM ad-

dress.

AS1 (RAM Address Strobe One) – The rising edge of

AS1 latches the upper four bits of the 4K x 8 RAM ad-

dress.

OER (RAM Output Enable) – OER is active low and

identifies the time period when the DS1385/DS1387

drives the bus with RAM read data.

WER (RAM Write Enable) – WER is an active low sig-

nal and is used to perform writes to the 4K x 8 RAM por-

tion of the DS1385/DS1387.

(DS1385 ONLY)

X1, X2 – Connections for a standard 32.768 KHz quartz

crystal. When ordering, request a load capacitance of 6

pF. The internal oscillator circuitry is designed for opera-

tion with a crystal having a specified load capacitance

(CL) of 6 pF. The crystal is connected directly to the X1

and X2 pins. There is no need for external capacitors or

resistors. Note: X1 and X2 are very high impedance

nodes. It is recommended that they and the crystal be

guard–ringed with ground and that high frequency sig-

nals be kept away from the crystal area. For more

information on crystal selection and crystal layout con-

siderations, please consult Application Note 58, “Crys-

tal Considerations with Dallas Real Time Clocks”.

VBAT, BGND – Battery input for any standard 3 volt lithi-

um cell or other energy source. Battery voltage must be

held between 2.5 and 3.7 volts for proper operation. The

nominal write protect trip point voltage is set by the inter-

nal circuitry and is 4.25 volts typical. A maximum load of

µA at 25°C and 3.0V on VBAT should in the absence of

power be used to size the external energy source.

The battery should be connected directly to the VBAT pin.

A diode must not be placed in series with the battery to

the VBAT pin. Furthermore, a diode is not necessary

because reverse charging current protection circuitry is

provided internal to the device and has passed the

requirements of Underwriters Laboratories for UL listing

(E99151).

ADDRESS MAP

The address map of the DS1385/DS1387 is shown in

Figure 2. The address map consists of the RTC and the

4K X 8 NV SRAM section. The RTC section contains

50–bytes of user RAM, 10–bytes of RAM that contain

the RTC time, calendar, and alarm data, and 4–bytes

which are used for control and status. All 64–bytes can

be directly written or read except for the following:

1. Registers C and D are read-only.

2. Bit–7 of Register A is read-only.

3. The high order bit of the seconds byte is read-only.

RTC (REAL TIME CLOCK)

The RTC function is the same as the DS1287 Real Time

Clock. Access to the RTC is accomplished with four

controls: ALE, RD, WR and CS. The RTC is the same in

the DS1287 with the following exceptions:

1. The MOT pin on the DS1285/DS1287 is not present

on the DS1385/DS1387. The bus selection capabili-

ty of the DS1285/DS1287 has been eliminated. Only

the Intel bus interface timing is applicable.

2. The RESET pin on the DS1285/DS1287 is not pres-

ent on the DS1385/DS1387. The DS1385/DS1387

will operate the same as the DS1285/DS1287 with

RESET tied to VCC.

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