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EM6605 Datasheet(PDF) 39 Page - National Semiconductor (TI) |
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EM6605 Datasheet(HTML) 39 Page - National Semiconductor (TI) |
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39 / 43 page ![]() EM6605 © EM Microelectonic-Marin SA, 2/99, Rev. B/243 39 17.7.RC Oscillator T= +25°C (unless otherwise specified) Parameter Conditions Symb. Min. Typ. Max. Unit Fabrication process stability (note1) Df / f * -20 ±10 * +20 % Voltage stability (note2) 2.4 - 5.0 V Df /f * DU -2% ± 0.3 +2% 1/V Temperature Stability (note2) -40°C- +85°C Df /f * DT 0.02% +0.06% 0.1% 1/°C External resistor for frequency (note4) (note5) Vdd>1.8V Rext 80* 120-330 600* k Ω Ext. capacitor (parallel to Rext) (note4) Cext 150 390 pF Oscillator start time (note3) Vdd>1.8V tdosc 0.1 1 ms System start time (note3) (oscillator+cold start reset) Vdd>1.8V tdsys 3 4 ms Oscillation detector frequency Vdd>1.8V & Vdd<5.0V fOD 4.0 15 kHz Note1: Typical value of ±10% for “Fabrication process stability” gives a range where about 93-98% of all pieces are situated relative to their mean frequency f *. Note2: Oscillator stability in voltage and temperature is for frequency range from 30kHz - 300 kHz Note3: Oscillator start time is for the worst case - 32 kHz frequency (low frequency) Note4: External capacitor parallel to Rext which set the system frequency – The capacitor must be as close as possible to RCin pin. The connection tw. Resistor and Capacitor on this pin must be really as short as possible otherwise the RC oscillator has bigger jitter. (capacitor is not obligatory but can improve voltage dependance and reduce jitter. Note5: External resistor Rext which can set the frequency can have bigger range but this should be discussed by EM for special cases only. Tests were made only during qualification of the product. 17.8.Input Timing characteristics 1.8V<Vdd<5.0V, -20°C <T<85°C (unless otherwise specified) at f=32kHz Parameter Conditions Symb. Min. Unit RESET pulse length to exit SLEEP mode RESET from SLEEP tRESsl 2 µs RESET pulse length (debounced) PortA , C pulse length (debounced) DebCK = 0 DebCK = 0 tdeb0 tdeb0 2 2 ms ms RESET pulse length (debounced) PortA , C pulse length (debounced) DebCK = 1 DebCK = 1 tdeb1 tdeb1 16 16 ms ms |
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