ISM330DLC datasheet(98/116 Pages) STMICROELECTRONICS

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ISM330DLC

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10.89

CTRL3_OIS (72h)

OIS configuration register. Primary interface for read-only (r); only Aux SPI can write to this

Table 217. CTRL3_OIS register

DEN_L

H_OIS

FS1_XL

_OIS

FS0_XL_

OIS

FILTER_XL_

CONF_OIS_1

FILTER_XL_C

ONF_OIS_0

ST1_OIS ST0_OIS

ST_OIS_

CLAMPDIS

Table 218. CTRL3_OIS register description

DEN_LH_OIS

Polarity of DEN signal on OIS chain

(0: DEN pin is active-low;

1: DEN pin is active-high)

FS[1:0]_XL_OIS

Accelerometer OIS channel full-scale selection. Default value: 00

(00: ±2 g;

01: ±16 g;

10: ±4 g;

11: ±8 g)

These two bits act only when the accelerometer GP chain is in

power-down, otherwise the accelerometer FS value is selected

only from the GP side (but it is readable also from the OIS side).

FILTER_XL_CONF_OIS [1:0]

Accelerometer OIS channel bandwidth selection (see Table 219)

ST[1:0]_OIS

Gyroscope OIS chain self-test selection

Table 220 lists the output variation when the self-test is enabled

and ST_OIS_CLAMPDIS = '1'. Default value: 00

(00: Normal mode;

01: Positive sign self-test;

10: Normal mode;

11: Negative sign self-test)

ST_OIS_CLAMPDIS

Gyro OIS chain clamp disable

(0: All gyro OIS chain outputs = 8000h during self-test applied from

primary interface;

1: OIS chain self-test outputs as shown in Table 220 if self-test

applied from primary or auxiliary interfaces)

Table 219. Accelerometer OIS channel bandwidth selection

FILTER_XL_

CONF_OIS [1:0]

ODR_GP = 0

ODR GP ≥ 1600 Hz

ODR GP ≤ 800 Hz

Phase delay(1)

1. Phase delay @ 20 Hz

Phase delay(1)

140 Hz

9.39°

128 Hz

11.5°

68.2 Hz

17.6°

66.5 Hz

19.7°

636 Hz

2.96°

329 Hz

5.08°

295 Hz

5.12°

222 Hz

7.23°

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