AD9277 datasheet(29/49 Pages) AD

29 / 49 page

AD9277

Rev. 0 | Page 28 of 48

For CW Doppler operation, the AD9277 integrates the LNA,

phase shifter, frequency conversion, and I/Q demodulation

into a single package and directly yields the baseband signal.

Figure 54 is a simplified diagram showing the concept for four

channels. The ultrasound wave (US wave) is received by four

transducer elements, TE1 through TE4, in an ultrasound probe

and generates signals E1 through E4. In this example, the phase

at TE1 leads the phase at TE2 by 45°.

In a real application, the phase difference depends on the

element spacing, wavelength (λ), speed of sound, angle of

incidence, and other factors. In Figure 54, the signals E1

through E4 are amplified by the low noise amplifiers. For

optimum signal-to-noise performance, the output of the LNA

is applied directly to the input of the demodulators. To sum the

signals E1 through E4, E2 is shifted 45° relative to E1 by setting

the phase code in Channel 2 to 0010, E3 is shifted 90° (0100), and

E4 is shifted 135° (0110). The phase-aligned current signals at

the output of the AD9277 are summed in an I-to-V converter to

provide the combined output signal with a theoretical improve-

ment in dynamic range of 6 dB for the four channels.

CW Application Information

The RESET pin is used to synchronize the LO dividers when

using multiple AD9277s. Because they are driven by the same

internal LO, the channels in any AD9277 are inherently syn-

chronous. However, when multiple AD9277s are used, it is

possible for their dividers to wake up in different phase states.

The function of the RESET pin is to phase align all the LO

signals in multiple AD9277s.

The 4LO divider of each AD9277 can be initiated in one of four

possible states: 0°, 90°, 180°, and 270° relative to other AD9277s.

The internally generated I/Q signals of each AD9277 LO are always

at a 90° angle relative to each other, but a phase shift can occur

during power-up between the dividers of multiple AD9277s

used in a common array.

The RESET mechanism also allows the measurement of non-

mixing gain from the RF input to the output. The rising edge of

the active high RESET pulse can occur at any time; however, the

duration should be ≥ 20 ns minimum. When the RESET pulse

transitions from high to low, the LO dividers are reactivated on

the next rising edge of the 4LO clock. To guarantee synchronous

operation of multiple AD9277s, the RESET pulse must go low

on all devices before the next rising edge of the 4LO clock.

Therefore, it is best to have the RESET pulse go low on the falling

edge of the 4LO clock; at the very least, the tSETUP should be ≥ 5 ns.

An optimal timing setup is for the RESET pulse to go high on a

4LO falling edge and to go low on a 4LO falling edge; this gives

15 ns of setup time even at a 4LO frequency of 32 MHz (8 MHz

internal LO).

Check the synchronization of multiple AD9277s using the

following procedure:

Activate at least one channel per AD9277 by setting the

appropriate channel enable bit in the serial interface (see

Table 18, Register 0x2D, Bit 4).

Set the phase code of all AD9277 channels to the same

logic state, for example, 0000.

Apply the same test signal to all devices to generate a sine

wave in the baseband output and measure the output of

one channel per device.

Apply a RESET pulse to all AD9277s.

Because all the phase codes of the AD9277s should be the

same, the combined signal of multiple devices should be N

times greater than a single channel. If the combined signal

is less than N times one channel, one or more of the LO

phases of the individual AD9277s is in error.

90°

45°

135°

0°

SUMMED

OUTPUT

S1 + S2 + S3 + S4

S1 THROUGH S4

ARE NOW

IN PHASE

PHASE BIT

SETTINGS

CH 1

PHASE SET

FOR 135°

LAG

CH 2

PHASE SET

FOR 90°

LAG

CH 3

PHASE SET

FOR 45°

LAG

CH 4

PHASE SET

FOR 0°

LAG

TRANSDUCER

ELEMENTS TE1

THROUGH TE4

CONVERT US TO

ELECTRICAL

SIGNALS

LNA

4 US WAVES

ARE DELAYED

45° EACH WITH

RESPECT TO

EACH OTHER

Figure 54. Simplified Example of the AD9277 Phase Shifter

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