AD9670BBCZ datasheet(21/53 Pages) AD

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AD9670

Data Sheet

Rev. A | Page 20 of 52

THEORY OF OPERATION

POST

AMP

LNA

GAIN–

GAIN+

SERIAL

LVDS

DEMOD/

DEC

FILTER

ATTENUATOR

–45dB TO 0dB

GAIN

INTERPOLATOR

PIPELINE

ADC

LOSW-x

LO-x

LI-x

LG-x

RESET+

MLO+

MLO–

RFB2

GENERATION

15.6dB,

17.9dB,

21.6dB

21dB,

24dB,

27dB,

30dB

CWI+

CWI–

CWQ+

CWQ–

DOUTx+

DOUTx–

RESET–

TX_TRIG–

TX_TRIG+

RFB1

CLG

CSH

TRANSDUCER

T/R

SWITCH

NCO

Figure 33. Simplified Block Diagram of a Single Channel

Each channel in the AD9670 contains both a TGC signal path and

a CW Doppler signal path. Common to both signal paths, the

LNA provides four user adjustable input impedance termination

options for matching different probe impedances. The CW

Doppler path includes an I/Q demodulator with programmable

phase rotation needed for analog beamforming. The TGC path

includes a differential X-AMP® VGA, an antialiasing filter, an

ADC, and a digital demodulator and decimator. Figure 33 shows

a simplified block diagram with external components.

TGC OPERATION

The system gain for TGC operation is distributed as shown in

Table 7.

Table 7. Channel Analog Gain Distribution

Section

Nominal Gain (dB)

LNA

15.6/17.9/21.6 (LNAGAIN)

Attenuator

−45 to 0 (VGAATT)

VGA

21/24/27/30 (PGAGAIN)

Filter

ADC

Each LNA output is dc-coupled to a VGA input. The VGA

consists of an attenuator with a range of −45 dB to 0 dB, followed

by an amplifier with 21 dB/24 dB/27 dB/30 dB of gain. The X-AMP

gain interpolation technique results in low gain error and uniform

bandwidth, and differential signal paths minimize distortion.

The linear in dB gain (law conformance) range of the TGC path is

45 dB. The slope of the gain control interface is 14 dB/V, and the

gain control range is −1.6 V to +1.6 V. Equation 1 is the expression

for the differential voltage, VGAIN, at the gain control interface.

Equation 2 is the expression for the VGA attenuation, VGAATT,

as a function of VGAIN.

VGAIN (V) = (GAIN+) − (GAIN−)

(1)

VGAATT (dB) = −14 dB/V (1.6) − VGAIN

(2)

Then, calculate the total channel gain using Equation 3.

Channel Gain (dB) = LNAGAIN + VGAATT + PGAGAIN

(

In its default condition, the LNA has a gain of 21.6 dB (12×),

and the VGA postamplifier gain is 24 dB. If the voltage on the

GAIN+ pin is 0 V and the voltage on the GAIN− pin is 1.6 V

(45.1 dB attenuation), the total gain of the channel is 0.5 dB if

the LNA input is unmatched. The channel gain is −5.5 dB if the

LNA is matched to 50 Ω (RFB = 300 Ω). However, if the voltage on

the GAIN+ pin is 1.6 V and the voltage on the GAIN− pin is 0 V

(0 dB attenuation), VGAATT = 0 dB. This results in a total gain of

45.3 dB through the TGC path if the LNA input is unmatched or a

total gain of 39.3 dB if the LNA input is matched.

In addition to the analog VGA attenuation described in Equation 2,

the attenuation level can be digitally controlled in 3.5 dB increm-

ents. In this case, Equation 3 is still valid and the value of VGAATT is

equal to the attenuation level set in SPI Register 0x011, Bits [7:4].

Low Noise Amplifier (LNA)

Good system sensitivity relies on a proprietary ultralow noise LNA

at the beginning of the signal chain, which minimizes the noise

contribution in the following VGA. Active impedance control

optimizes noise performance for applications that benefit from

input impedance matching.

The LNA inputs, LI-x, are capacitively coupled to the source.

An on-chip bias generator establishes dc input bias voltages of

approximately 2.2 V and centers the output common-mode levels

at 1.5 V (AVDD2 divided by 2). A capacitor, CLG, of the same

value as the input coupling capacitor, CS, is connected from the

LG-x pins into ground.

The LNA supports three gain settings, 21.6 dB, 17.9 dB, or 15.6 dB,

set through the SPI. Overload protection ensures quick recovery

time from large input voltages.

Low value feedback resistors and the current driving capability

of the output stage allow the LNA to achieve a low input referred

noise voltage of 0.78 nV/√Hz (at a gain of 21.6 dB). On-chip

resistor matching results in precise single-ended gains, which

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