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AD603

Data Sheet

Rev. K | Page 18 of 24

APPLICATIONS INFORMATION

A LOW NOISE AGC AMPLIFIER

Figure 49 shows the ease with which the AD603 can be

connected as an AGC amplifier. The circuit illustrates many of

the points previously discussed: it uses few parts, has linear-in-

dB gain, operates from a single supply, uses two cascaded amplifiers

in sequential gain mode for maximum SNR, and an external

resistor programs each gain of the amplifier. It also uses a

simple temperature-compensated detector.

The circuit operates from a single 10 V supply. Resistors R1, R2,

R3, and R4 bias the common pins of A1 and A2 at 5 V. The

common pin is a low impedance point and must have a low

impedance path to ground, provided here by the 100 μF tantalum

capacitors and the 0.1 μF ceramic capacitors.

The cascaded amplifiers operate in sequential gain. Here, the

offset voltage between Pin 2 (GNEG) of A1 and A2 is 1.05 V

(42.14 dB × 25 mV/dB), provided by a voltage divider consisting of

Resistors R5, R6, and R7. Using standard values, the offset is not

exact, but it is not critical for this application.

The gain of both A1 and A2 is programmed by Resistors R13

and R14, respectively, to be about 42 dB; therefore, the maximum

gain of the circuit is twice that, or 84 dB. The gain control range

can be shifted up by as much as 20 dB by appropriate choices of

R13 and R14.

The circuit operates as follows:

 A1 and A2 are cascaded.

 Capacitor C1 and the 100 Ω of resistance at the input of A1

form a time constant of 10 μs.

 C2 blocks the small dc offset voltage at the output of A1

(which might otherwise saturate A2 at its maximum gain)

and introduces a high-pass corner at about 16 kHz,

eliminating low frequency noise.

A half-wave detector is used, based on Q1 and R8. The current

into capacitor, CAV, is the difference between the collector

current of Q2 (biased to be 300 μA at 300 K, 27°C) and the

collector current of Q1, which increases with the amplitude

of the output signal.

The automatic gain control voltage, VAGC, is the time integral

of this error current. For VAGC (and thus the gain) to remain

insensitive to short-term amplitude fluctuations in the output

signal, the rectified current in Q1 must, on average, exactly

balance the current in Q2. If the output of A2 is too small to

do this, VAGC increases, causing the gain to increase until Q1

conducts sufficiently.

Consider the case where R8 is zero and the output voltage VOUT

is a square wave at, for example, 455 kHz, which is well above

the corner frequency of the control loop.

0.1µF

R1 3

2.49kΩ

10V

5.5V

6.5V

2.49kΩ

C32

100µF

0.1µF

2.49kΩ

RT1

100Ω

1.05kΩ

5.49kΩ

3.48kΩ

10V

AGC LINE

CAV

0.1µF

THIS CAPACITOR SETS

AGC TIME CONSTANT

VAGC

1.54kΩ

806Ω

2N3904

2N3906

R1 0

1.24kΩ

R11

3.83kΩ

R1 2

4.99kΩ

C11

0.1µF

10V

C10

0.1µF

10V

0.1µF

AD603

R1 4

2.49kΩ

C52

100µF

0.1µF

2.49kΩ

10V

0.1µF

AD603

1V OFFSET FOR

SEQUENTIAL GAIN

1 RT PROVIDES A 50Ω INPUT IMPEDANCE.

2 C3 AND C5 ARE TANTALUM.

Figure 49. A Low Noise AGC Amplifier

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