DRV10975ZPWPR datasheet(45/64 Pages) TI1

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DRV10975, DRV10975Z

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SLVSCP2D – JANUARY 2015 – REVISED MARCH 2018

Product Folder Links: DRV10975

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Table 9. Register Description (continued)

Data

Description

Name

Address

Bits

SysOpt1(3)

0x23

7:6

ISDThr[1:0]

ISD stationary judgment threshold

00 = 6 Hz (80 ms, no zero cross)

01 = 3 Hz (160 ms, no zero cross)

10 = 1.6 Hz (320 ms, no zero cross)

11 = 0.8 Hz (640 ms, no zero cross)

5:4

IPDAdvcAgl [1:0]

Advancing angle after inductive sense

00 = 30°

01 = 60°

10 = 90°

11 = 120°

ISDen

0 = Initial speed detect (ISD) disable

1 = ISD enable

RvsDrEn

0 = Reverse drive disable

1 = Reverse drive enable

1:0

RvsDrThr[1:0]

The threshold where device starts to process reverse drive (RvsDr) or brake.

00 = 6.3 Hz

01 = 13 Hz

10 = 26 Hz

11 = 51 Hz

SysOpt2(3)

0x24

7:6

OpenLCurr[1:0]

Open loop current setting.

00 = 0.2 A

01 = 0.4 A

10 = 0.8 A

11 = 1.6 A

5:3

OpLCurrRt:[2:0]

Open-loop current ramp-up rate setting

000 = 6 VCC/s

001 = 3 VCC/s

010 = 1.5 VCC/s

011 = 0.7 VCC/s

100 = 0.34 VCC/s

101 = 0.16 VCC/s

110 = 0.07 VCC/s

111 = 0.023 VCC/s

2:0

BrkDoneThr [2:0]

Braking mode setting

000 = No brake (BrkEn = 0)

001 = 2.7 s

010 = 1.3 s

011 = 0.67 s

100 = 0.33 s

101 = 0.16 s

110 = 0.08 s

111 = 0.04 s

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