S29GL032A datasheet(42/88 Pages) SPANSION

42 / 88 page

S29GLxxxA MirrorBit™ Flash Family

S29GLxxxA_00_A2 January 28, 2005

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Inf o rmation

Table 22. System Interface String

Note: CFI data related to VCC and time-outs may differ from actual VCC and time-outs of the product. Please consult the Ordering

Information tables to obtain the VCC range for particular part numbers. Please consult the Erase and Programming Performance table

for typical timeout specifications.

Addresses

(x16)

Addresses

(x8)

Data

Description

1Bh

36h

0027h

VCC Min. (write/erase)

D7–D4: volt, D3–D0: 100 millivolt

1Ch

38h

0036h

VCC Max. (write/erase)

D7–D4: volt, D3–D0: 100 millivolt

1Dh

3Ah

0000h

VPP Min. voltage (00h = no VPP pin present)

1Eh

3Ch

0000h

VPP Max. voltage (00h = no VPP pin present)

1Fh

3Eh

0007h

Reserved for future use

20h

40h

0007h

Typical timeout for Min. size buffer write 2N

µs (00h = not supported)

21h

42h

000Ah

Typical timeout per individual block erase 2N ms

22h

44h

0000h

Typical timeout for full chip erase 2N ms (00h = not supported)

23h

46h

0001h

Reserved for future use

24h

48h

0005h

Max. timeout for buffer write 2N times typical

25h

4Ah

0004h

Max. timeout per individual block erase 2N times typical

26h

4Ch

0000h

Max. timeout for full chip erase 2N times typical (00h = not supported)

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