LM12434 datasheet(74/80 Pages) NSC

74 / 80 page

80 Analog Considerations (Continued)

The LM124348 is designed to operate from a single a5V

power supply The LM12 L 438 is designed to operate from

a single a33V supply The separate supply and ground

pins for the analog and digital portions of the circuit allow

separate external bypassing To minimize power supply

noise and ripple adequate bypass capacitors should be

placed directly between power supply pins and their associ-

ated grounds Both supply pins are generally connected to

the same supply source In systems with separate analog

and digital supplies the DAS should be powered from the

analog supply At least a 10 mF tantalum electrolytic capaci-

tor in parallel with a 01 mF monolithic ceramic capacitor is

recommended for bypassing each power supply The key

consideration for these capacitors is to have the low series

resistance and inductance The capacitors should be placed

as close as physically possible to the supply and ground

pins with the smaller capacitor closer to the device The

capacitors also should have the shortest possible leads in

order to minimize series lead inductance Surface mount

chip capacitors are optimal in this respect and should be

used when possible

When the power supply regulator is not local on the board

adequate bypassing (a high value electrolytic capacitor)

should be placed at the power entry point The value of the

capacitor depends on the total supply current of the circuits

on the PC board All supply currents should be supplied by

the capacitor instead of being drawn from the external sup-

ply lines while the external supply charges the capacitor at

a steady rate

The DAS has two VDa and DGND pins on two sides of its

package It is recommended to use a 01 mFplusa10 mF

capacitor between pins 15 and 16 (VDa) and 14 (DGND)

and a 01 mF capacitor between pins 28 (VDa) and 1

(DGND) for the PLCC package The respective pins for the

SO package are 21 and 22 (VDa) and 20 (DGND) 6 (VDa)

and 7 (DGND) The layout diagrams in Section 88 show the

recommended placement for the supply bypass capacitors

88 PC BOARD LAYOUT AND GROUNDING

CONSIDERATIONS

To get the best possible performance from the LM12434

and LM12 L 438 the printed circuit boards should have

separate analog and digital ground planes The reason for

using two ground planes is to prevent digital and analog

ground currents from sharing the same path until they reach

a very low impedance power supply point This will prevent

noisy digital switching currents from being injected into the

analog ground

Figure 20 illustrates a favorable layout for ground planes

power supply and reference input bypass capacitors

Figure

20a shows a layout using a 28-pin PLCC socket and

through-hole assembly

Figure 20b shows a surface mount

layout for the same 28-pin PLCC package A similar ap-

proach should be used for the SO package

The analog ground plane should encompass the area under

the analog pins and any other analog components such as

the reference circuit input amplifiers signal conditioning cir-

cuits and analog signal traces

The digital ground plane should encompass the area under

the digital circuits and the digital inputoutput pins of the

DAS Having a continuous digital ground plane under the

data and clock traces is very important This reduces the

overshootundershoot and high frequency ringing on these

lines that can be capacitively coupled to analog circuitry

sections through stray capacitances

The AGND and DGND in the LM12434 and LM12 L 438

are not internally connected together They should be con-

nected together on the PC board right at the chip This will

provide the shortest return path for the signals being ex-

changed between the internal analog and digital sections of

the DAS

It is also a good design practice to have power plane layers

in the PC board This will improve the supply bypassing (an

effective distributed capacitance between power and

ground plane layers) and voltage drops on the supply lines

However power planes are not essential as ground planes

are for the performance of the DAS If power planes are

used they should be separated into two planes and the

area and connections should follow the same guidelines as

mentioned for the ground planes Each power plane should

be laid out over its associated ground planes avoiding any

overlap between power and ground planes of different

types When the power planes are not used it is recom-

mended to use separate supply traces for the VAa and

VDa pins from a low impedance supply point (the regulator

output or the power entry point to the PC board) This will

help ensure that the noisy digital supply does not corrupt

the analog supply

When measuring AC input signals with the DAS any cross-

talk between analog inputoutput lines and the reference

lines (IN0 – IN7 MUXOUTg SH INg VREFg) should be

minimized Cross talk is minimized by reducing any stray

capacitance between the lines This can be done by in-

creasing the clearance between traces keeping the traces

as short as possible shielding traces from each other by

placing them on different sides of the AGND plane or run-

ning AGND traces between them

Figure 20 also shows the reference input bypass capacitors

Here the reference inputs are considered to be differential

The performance of the DAS improves by having a 01 mF

capacitor between the VREFa and VREFb and by bypass-

ing in a manner similar to that described in Section 87 for

the supply pins When a single ended reference is used

VREFb is connected to AGND and only two capacitors are

used between VREFa and VREFb (01 mF a 10 mF) It is

recommended to directly connect the AGND side of these

capacitors to the VREFb instead of connecting VREFb and

the ground sides of the capacitors separately to the ground

planes This provides a significantly lower-impedance con-

nection when using surface mount technology

Figure 21 is intended to give a general idea of how the DAS

should be wired and interfaced to a mC that operates in the

Standard Interface mode All necessary analog and digital

power supply and voltage reference bypass capacitors are

shown A voltage reference of 4096V generated by the

LM4040-41 is connected to the VREFa of the DAS and the

VREFb is connected to analog ground The serial interface

pins P1 through P5 of the DAS are connected to the mC’s

serial control lines and the interrupt pin of the DAS is wired

directly to the interrupt of the mC In this diagram the DAS

runs on a separate clock than the mC however in some

applications the DAS analog clock (CLK) may be a deriva-

tive of the mC’s clock

LM12434 Datasheet(PDF) 74 Page - National Semiconductor (TI)

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