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PD64012 Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers

Part # PD64012
Description  12-channel PoE Manager
PDF  16 Pages
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PD64012
12-CHANNEL PoE MANAGER
Pins Descriptions ______________________________________________
PIN
PIN NAME
PIN TYPE
PIN DESCRIPTION
1.
VPORT_POS0
Analog I/O
Port 0 positive voltage feeding
2.
VPORT_POS1
Analog I/O
Port 1 positive voltage feeding
3.
VPORT_POS2
Analog I/O
Port 2 positive voltage feeding
4.
VPORT_POS3
Analog I/O
Port 3 positive voltage feeding
5.
VPORT_POS4
Analog I/O
Port 4 positive voltage feeding
6.
VPORT_POS5
Analog I/O
Port 5 positive voltage feeding
7.
VPORT_POS6
Analog I/O
Port 6 positive voltage feeding
8.
VPORT_POS7
Analog I/O
Port 7 positive voltage feeding
9.
VPORT_POS8
Analog I/O
Port 8 positive voltage feeding
10. VPORT_POS9
Analog I/O
Port 9 positive voltage feeding
11. VPORT_POS10
Analog I/O
Port 10 positive voltage feeding
12. VPORT_POS11
Analog I/O
Port 11 positive voltage feeding
13. Vmain
Supply
Main Voltage supply
14. CP_IN
Analog I/O
Charge Pump input, 48V+5V
15. CP_OUT
Analog I/O
Charge Pump Pulse Output
16. REF_PORT_NEG Analog I/O
Port negative reference
17. TEST_MODE
Analog I/O
Test Mode Pin (connect to ground)
18. VPORT_NEG11
Analog I/O
Port 11 negative voltage feeding
19. AGND
Supply
Analog ground
20. PORT_SENSE11
Analog I/O
Channel current monitoring
21. VPORT_NEG10
Analog I/O
Port 10 negative voltage feeding
22. PORT_SENSE10
Analog I/O
Channel current monitoring
23. VPORT_NEG9
Analog I/O
Port 9 negative voltage feeding
24. PORT_SENSE9
Analog I/O
Channel current monitoring
25. PORT_SENSE8
Analog I/O
Channel current monitoring
26. VPORT_NEG8
Analog I/O
Port 8 negative voltage feeding
27. PORT_SENSE7
Analog I/O
Channel current monitoring
28. VPORT_NEG7
Analog I/O
Port 7 negative voltage feeding
29. PORT_SENSE6
Analog I/O
Channel current monitoring
30. DISABLE_PORTS_N Digital input
Disable all ports power (active low)
31. VPORT_NEG6
Analog I/O
Port 6 negative voltage feeding
32. CS1_N
Digital I/O
SPI bus, Chip Select 1
33. DGND
Supply
Digital ground
34. CS0_N
Digital I/O
SPI bus, Chip Select 0
35. MISO
Digital I/O
SPI bus, Master in/slave out
36. MOSI
Digital I/O
SPI bus, Master out/slave in
37. SCK
Digital input
SPI bus, Serial clock I/O
38. SCL
Digital input
I2C bus, Serial Clock Input
39. SDA
Digital I/O
I2C bus, open drain
40. RESET_N
Digital I/O
Active Low Reset I/O
41. IREF
Analog I/O
Current reference
42. ASICINI
Analog input
Analog input for ASIC initialization
43. VCC2p5
Supply
Internal 2.5 V supply (do not use!)
44. I2CINI
Analog input
Analog input for I2C initialization
45. QGND
Supply
Quiet analog ground
46. ADC2p5
Supply
ADC reference (do not use!)
47. EXT_REG
Analog out
External regulation
48. VPERI
Analog out
Regulated 3.3 V power source
49. Reserved
Digital input
(Connect to ground)
50. VPORT_NEG5
Analog I/O
Port 5 negative voltage feeding
www.powerdsine.com
© PowerDsine 2003
Information in this document subject
06-0003-058 (Rev. 2.8) / 5 August 2004
to change without prior notice.
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