MP8869GL datasheet(18/37 Pages) MPS

18 / 37 page

MP8869

– 17V, 12A, SYNCHRONOUS STEP-DOWN CONVERTER

PRELIMINARY SPECIFICATIONS SUBJECT TO CHANGE

MP8869 Rev.1.0

www.MonolithicPower.com

6/8/2016

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

Light-Load Operation

When the MP8869 works in auto PFM/PWM

mode or light-load operation, the MP8869

reduces the switching frequency automatically

to maintain high efficiency, and the inductor

current drops almost to zero. When the inductor

current reaches zero, the LS-FET driver goes

into tri-state (high-Z) (see Figure 4). The output

capacitors discharge slowly to GND through R1

and R2. This operation improves efficiency

greatly when the output current is low.

VEAO

VOUT

VIN

Ton is constant

VSW

VRAMP

IOUT

Current Modulator Time

Figure 4: Light-Load Operation

Light-load operation is also called skip mode

because the HS-FET does not turn on as

frequently during heavy-load condition. The

frequency at which the HS-FET turns on is a

function of the output current. As the output

current increases, the time period that the

current modulator regulates becomes shorter,

the HS-FET turns on more frequently, and the

switching frequency increases. The output

current reaches critical levels when the current

modulator time is zero and can be determined

with Equation (1):

OUT

) V

2 L F





 



(1)

The device reverts to PWM mode once the

output

current

exceeds

the

critical

level.

Afterward, the switching frequency remains

fairly constant over the output current range.

The MP8869 can operate in pulse frequency

modulation (PFM) mode under light load to

improve

efficiency

(low-power

mode).

The

MP8869 can also operate in forced PWM mode

at any load condition. This mode is selectable

through the I

2C control. To enable low-power

mode, set the mode bit to 0. To disable low

power mode, set the Mode bit to 1, and the

converter will work in forced PWM mode. The

Mode bit is set to 0 (PFM) by default.

Operating without an External Ramp

The traditional constant-on-time control scheme

is intrinsically unstable if the

output capacitor’s

ESR is not large enough to be an effective

current-sense

resistor.

Ceramic

capacitors

cannot be used as output capacitors, usually.

The

MP8869

has

built-in,

internal

ramp

compensation to ensure that the system is

stable, even without the help of the output

capacitor’s ESR. The pure ceramic capacitor

solution can reduce the output ripple, total BOM

cost, and board area significantly.

VCC Regulator

A 3.5V internal regulator powers most of the

internal

circuitries.

470nF

decoupling

capacitor is needed to stabilize the regulator

and reduce ripple. This regulator takes the VIN

input and operates in the full VIN range. After

EN is pulled high, and VIN is greater than 3.5V,

the output of the regulator is in full regulation.

When VIN is lower than 3.5V, the output

voltage

decreases

and

follows

the

input

voltage.

A 0.47μF ceramic capacitor is required

for decoupling.

Error Amplifier (EA)

The error amplifier (EA) compares the FB

voltage against the internal 0.6V reference

(REF) for non-I

2C mode and outputs a PWM

signal. In I

2C mode, FB is opened, and VOUT is

connected to the EA non-inverter input. The

reference voltage can be programmed from

0.6V to 1.87V in the I

2C control loop. The

optimized

internal

ramp

compensation

minimizes the external component count and

simplifies the control loop design.

Enable (EN)

EN is a digital control pin that turns the

regulator, including the I

2C block, on and off.

Drive EN high to turn on the regulator; drive EN

low to turn off the regulator. An internal 1.5M

Ω

resistor is connected from EN to ground. EN

can operate with an 18V input voltage, which

allows EN to be directly connected to VIN for

automatic start-up. When the external EN is

high, set the EN bit to 0 in register 01 to stop

the HS-FET and LS-FET from switching. The

MP8869 resumes switching by setting the EN

bit to 1.

MP8869GL Datasheet(PDF) 18 Page - Monolithic Power Systems

MP8869GL Datasheet(HTML) 18 Page - Monolithic Power Systems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37

Datasheet Download

Link URL