MP9943 – 36V, 3A PEAK SYNCHRONOUS STEP-DOWN CONVERTER

MP9943 Rev.1.1

www.MonolithicPower.com

15

7/4/2017

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APPLICATION INFORMATION

Setting the Output Voltage

The external resistor divider sets the output

voltage (see Typical Application on page 1).

Choose R7 around 41.2kΩ. R8 is then given by:

1

0.792V

V

R7

R8

OUT





The T-type network—as shown in Figure —is

R7

R8

RT

Figure 5: T-Type Network

RT+R7 is used to set the loop bandwidth.

Basically, higher RT+R7, lower bandwidth. To

ensure

the

loop

stability,

it

is

strongly

recommended to limit the bandwidth lower than

40kHz based on the 410kHz default fsw. Table 1

lists the recommended T-type resistors value for

common output voltages.

Table 1: Resistor Selection for Common Output

Voltages

(7)

R7 (kΩ)

R8 (kΩ)

RT (kΩ)

3.3

41.2 (1%)

13 (1%)

51 (1%)

5

41.2 (1%)

7.68 (1%)

51 (1%)

Notes:

7) The recommended parameters is basing on 410kHz switching

frequency, different input voltage, output inductor value and

output capacitor value may affect the select of R7, R8 and RT.

For other components’ parameters, please refer to TYPICAL

APPLICATION CIRCUITS on page 19.

Selecting the Inductor

Use a 1µH-to-10µH inductor with a DC current

rating of at least 25% percent higher than the

maximum load current for most applications. For

highest efficiency, an inductor with small DC

resistance is recommended. For most designs,

the inductance value can be derived from the

following equation.

OUT

IN

OUT

1

IN

L

OSC

V(V

V

)

L

VI

f





 

Choose the inductor ripple current to be

approximately 30% of the maximum load current.

The maximum inductor peak current is:

2

I

I

I

L

LOAD

)

MAX

(

L







Use a larger inductor for improved efficiency

under light-load conditions—below 100mA.

VIN UVLO Setting

MP9943 has internal fix under voltage lock out

(UVLO) threshold: rising threshold is 3.5V while

falling threshold is about 3.3V. For the application

needs higher UVLO point, external resistor

divider between EN/SYNC and IN as shown in

Figure 6 can be used to get higher equivalent

UVLO threshold.

VIN

EN/SYNC

IN

500k

Figure 6: Adjustable UVLO using EN/SYNC divider

The UVLO threshold can be computed from

below two equations:

EN_RISING

EN_DOWN

EN_UP

RISING

V

500k//R

R

(1

INUV







)

EN_FALLING

EN_DOWN

EN_UP

FALLING

V

500k//R

R

(1

INUV







)

to limit the current flows into EN/SYNC pin lower

than 150uA.