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MP9943 Datasheet(PDF) 13 Page - Monolithic Power Systems |
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MP9943 Datasheet(HTML) 13 Page - Monolithic Power Systems |
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13 / 20 page ![]() MP9943 – 36V, 3A PEAK SYNCHRONOUS STEP-DOWN CONVERTER MP9943 Rev.1.1 www.MonolithicPower.com 13 7/4/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. Under-Voltage Lockout Under-voltage lockout (UVLO) protects the chip from operating at an insufficient supply voltage. The MP9943 UVLO comparator monitors the output voltage of the internal regulator, VCC. The UVLO rising threshold is about 3.5V while its falling threshold is 3.3V. Internal Soft-Start The soft-start prevents the converter output voltage from overshooting during startup. When the chip starts, the internal circuitry generates a soft-start voltage (SS) that ramps up from 0V to 1.2V. When SS is lower than REF, SS overrides REF so the error amplifier uses SS as the reference. When SS exceeds REF, the error amplifier uses REF as the reference. The SS time is internally set to 1.5ms. Over-Current Protection and Hiccup The MP9943 has cycle-by-cycle over current limit when the inductor current peak value exceeds the set current limit threshold. If the output voltage starts to drop until FB is below the Under- Voltage (UV) threshold—typically 84% below the reference—the MP9943 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is dead- shorted to ground. The average short-circuit current is greatly reduced to alleviate the thermal issue and to protect the regulator. The MP9943 exits the hiccup mode once the over-current condition is removed. Thermal Shutdown Thermal shutdown prevents the chip from operating at exceedingly high temperatures. When the silicon die temperature exceeds 170°C, it shuts down the whole chip. When the temperature drops below its lower threshold (typically 140°C) the chip is enabled again. Floating Driver and Bootstrap Charging An external bootstrap capacitor power the floating-power-MOSFET driver. A dedicated internal regulator (see Figure 4) charges and regulates the bootstrap capacitor voltage to ~5V. When the voltage between the BST and SW nodes drops below regulation, a PMOS pass transistor connected from VIN to BST turns on. The charging current path is from VIN, BST and then to SW. The external circuit should provide enough voltage headroom to facilitate charging. As long as VIN is significantly higher than SW, the bootstrap capacitor remains charged. When the HS-FET is on, VIN ≈ VSW, so the bootstrap capacitor can’t be charged. When the LS-FET is on, VIN−VSW reaches its maximum for fast charging. When there is no inductor current, VSW=VOUT, so the difference between VIN and VOUT can charge the bootstrap capacitor. The floating driver has its own UVLO protection, with a rising threshold of 2.2V and hysteresis of 150mV. A 20Ω resistor placed between SW and BST cap is strongly recommended to reduce SW spike voltage. Figure 4: Internal Bootstrap Charging Circuit Startup and Shutdown If both VIN and VEN/SYNC exceed their appropriate thresholds, the chip starts: The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries. Three events can shut down the chip: VEN/SYNC low, VIN low, and thermal shutdown. In the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. Power Good The MP9943 has power good (PG) output. The PG pin is the open drain of a MOSFET. It should be connected to VCC or some other voltage source through a resistor (e.g. 100kΩ). In the presence of an input voltage, the MOSFET turns on so that the PG pin is pulled to low before SS |
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