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MP9943 Datasheet(PDF) 12 Page - Monolithic Power Systems

Part # MP9943
Description  High Efficiency 3A Peak, 36V, Synchronous Step Down Converter With Power Good
PDF  20 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP9943 Datasheet(HTML) 12 Page - Monolithic Power Systems

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MP9943 – 36V, 3A PEAK SYNCHRONOUS STEP-DOWN CONVERTER
MP9943 Rev.1.1
www.MonolithicPower.com
12
7/4/2017
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2017 MPS. All Rights Reserved.
OPERATION
The MP9943 is a high-frequency, synchronous,
rectified, step-down, switch-mode converter with
built-in power MOSFETs. It offers a very compact
solution to achieve 3A peak output current with
excellent load and line regulation over a wide
input supply range.
When MP9943 operates in a fixed-frequency,
peak-current–control mode to regulate the output
voltage. An internal clock initiates a PWM cycle.
The integrated high-side power MOSFET turns
on and remains on until its current reaches the
value set by the COMP voltage. When the power
switch is off, it remains off until the next clock
cycle starts. If the current in the power MOSFET
does not reach the current value set by COMP
within 95% of one PWM period, the power
MOSFET will be forced to turn off.
Internal Regulator
The 5V internal regulator power most of the
internal circuitries. This regulator is supplied by
the VIN input and operates in the full VIN range:
When VIN exceeds 5.0V, the output of the
regulator is in full regulation; when VIN falls below
5.0V, the output of the regulator decreases
following the VIN. A 0.1uF decoupling ceramic
capacitor is needed at the pin.
Error Amplifier
The error amplifier compares the FB pin voltage
against the internal 0.8V reference (REF) and
outputs a COMP voltage—this COMP voltage
controls the power MOSFET current. The
optimized
internal
compensation
network
minimizes the external component count and
simplifies the control loop design.
Power Save Mode for Light Load Condition
The MP9943 has AAM (Advanced Asynchronous
Modulation) power-save mode for light load. The
AAM threshold is fixed internally. Under the
heavy load condition, the VCOMP is higher than
VAAM. When the clock goes high, the high-side
power MOSFET turns on and remains on until
VILsense reaches the value set by the COMP
voltage. The internal clock resets every time
when VCOMP is higher than VAAM.
Under the light load condition, the value of VCOMP
is low. When VCOMP is less than VAAM and VFB is
less than VREF, VCOMP ramps up until it exceeds
VAAM. During this time, the internal clock is
blocked, thus the MP9943 skips some pulses for
PFM (Pulse Frequency Modulation) mode and
achieves the light load power save.
Figure 2: Simplified AAM Control Logic
Enable/SYNC control
EN/SYNC is a digital control pin that turns the
regulator on and off: Drive EN/SYNC high to turn
on the regulator, drive it low to turn it off. An
internal 500kΩ resistor from EN/SYNC to GND
allows EN/SYNC to be floated to shut down the
chip.
The EN/SYNC pin is clamped internally using a
6.5V series Zener diode, as shown in Figure 3.
Connect the EN/SYNC input pin through a pullup
resistor to any voltage connected to the VIN pin—
the pullup resistor limits the EN/SYNC input
current to less than 150µA.
For example, with 12V connected to VIN, RPULLUP
≥ (12V – 6.5V) ÷ 150µA = 36.7kΩ.
Connecting the EN/SYNC pin directly to a
voltage source without any pullup resistor
requires limiting voltage amplitude to ≤6V to
prevent damage to the Zener diode.
Figure 3: 6.5V-Type Zener Diode
Connect an external clock with a range of
200kHz to 2.2MHz 2ms after output voltage is set
to synchronize the internal clock rising edge to
the external clock rising edge. The pulse width of
external clock signal should be less than 2μs.



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