Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

LM9801 Datasheet(PDF) 15 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LM9801
Description  Greyscale/24-Bit Color Linear CCD Sensor Processor
PDF  34 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM9801 Datasheet(HTML) 15 Page - National Semiconductor (TI)

Back Button LM9801 Datasheet HTML 11Page - National Semiconductor (TI) LM9801 Datasheet HTML 12Page - National Semiconductor (TI) LM9801 Datasheet HTML 13Page - National Semiconductor (TI) LM9801 Datasheet HTML 14Page - National Semiconductor (TI) LM9801 Datasheet HTML 15Page - National Semiconductor (TI) LM9801 Datasheet HTML 16Page - National Semiconductor (TI) LM9801 Datasheet HTML 17Page - National Semiconductor (TI) LM9801 Datasheet HTML 18Page - National Semiconductor (TI) LM9801 Datasheet HTML 19Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 15 / 34 page
background image
TABLE I Configuration Register Address Table
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
000
Standard
Width
Pulse
RS
Polarity
Pulse
RS
RS Pulse Position
Mode or
EvenOdd
Mode
MODE
RSW1
RSW0
RSPOL
RSPOS3
RSPOS2
RSPOS1
RSPOS0
001
Sample Reference Position
Sample Signal Position
(Maximum Register Value is 14)
SR3
SR2
SR1
SR0
SS3
SS2
SS1
SS0
w
1
w
2RS
TR
TR Pulse Width
TR – w1TR
0
1
0
Enable
Enable
Enable
Enable
Guardband
Polarity
w
1EN
w
2EN
RSEN
TREN
TRW1
TRW0
TRGRD
TRPOL
011
Signal
Dummy Pixels (Minimum Register Value is 2)
Polarity
SIGPOL
BLS6
BLS5
BLS4
BLS3
BLS2
BLS1
BLS0
100
Optical Black Pixels (Minimum Register Value is 1)
BLL7
BLL6
BLL5
BLL4
BLL3
BLL2
BLL1
BLL0
101
PGA Gain Coefficient
GAIN7
GAIN6
GAIN5
GAIN4
GAIN3
GAIN2
GAIN1
GAIN0
PGA Gain
Offset DAC
Power-
Offset
VGA Gain
VGA
VGA
VGA Gain
1
1
0
Source
Sign
down
Add
MSB
Gain
Gain
LSB
PGASRC
ODSIGN
PD
OFFADD
VGA3
VGA2
VGA1
VGA0
Offset DAC
Offset DAC
Offset DAC
Offset DAC
Test Modes
1
1
1
MSB
LSB
VOS3
VOS2
VOS1
VOS0
0
0
0
0
TABLE II Configuration Register Parameters
Parameter
Control Bits
Result
MODE
MODE
0
Standard CCD (w frequency e fMCLK 8)
1
EvenOdd CCD (w frequency e fMCLK 16)
RS Pulse Width
(tRSWIDTH)
RS1
RS0
00
1tMCLK (50 ns)
01
2tMCLK (100 ns)
10
3tMCLK (150 ns)
11
4tMCLK (200 ns)
RS Pulse Polarity
RSPOL
0
RS
1
RS
Note
tMCLK e 1fMCLK e 1 MCLK period Examples given in parenthesis are for fMCLK e 20 MHz (tMCLK e 50 ns)
http
www nationalcom
15



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com