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LM9801CCVF Datasheet(PDF) 24 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LM9801CCVF
Description  Greyscale/24-Bit Color Linear CCD Sensor Processor
PDF  34 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM9801CCVF Datasheet(HTML) 24 Page - National Semiconductor (TI)

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Applications Information (Continued)
49 ADC
The ADC converts the normalized analog output signal to
an 8-bit digital code The EOC output goes from high to low
to indicate that a new conversion is ready ADC data can be
latched by external memory on the rising edge of EOC The
RD input takes the ADC’s output buffer in and out of
TRI-STATE RD may be tied to EOC in many applications
putting the data on the bus only when EOC is low and al-
lowing other data on the bus (such as CD0 – CD7 correction
data) at other times In this way the output data and correc-
tion coefficient data can share the same databus (see Dia-
gram 12)
50 CALIBRATION
Calibration of a CCD scanner is done to normalize the pixels
of a linear CCD so that each pixel produces the same digital
output code at the output of the scanner when presented
with the same image light intensity This intensity ranges
from black (no light) to white (maximum light intensity) The
CCD’s analog output may have large pixel-to-pixel DC off-
sets (corresponding to errors on black signals) and pixel-to-
pixel variations in their output voltage given the same white
image (corresponding to errors on brighter signals) If these
offsets are subtracted from each pixel and each pixel is
given its own gain setting to correct for different efficiencies
then these errors can be eliminated
Ideally the digital output code for any pixel would be zero for
a black image and some code near fullscale for an image
with maximum brightness For an 8-bit system like the
LM9801 that code might be 250 This code will be called
the Target Code
The LM9801 eliminates these global and pixel-to-pixel off-
set and gain errors with its Correlated Double Sampling
(CDS) Offset DACs Variable Gain Amplifier and pixel-rate
Programmable Gain Amplifier This section describes how
to program the LM9801 and the coefficient RAM being used
with it to eliminate these errors
Calibration of a LM9801-based system requires 3 steps
The first described in Section 51
Offset Calibration takes
a black image and normalizes the digital output code for
each pixel to a code at or near 0
The second step Section 52
Coarse Gain (VGA) Calibra-
tion finds the optimum gain setting that places the output
voltage of all the pixels within the 9 dB adjustment range of
the PGA
The final step described in Section 53
PGA Correction
Coefficients (Shading Calibration) describes how to calcu-
late the gain required to normalize the output of each pixel
to the desired output code (the Target code)
51 Offset Calibration
This procedure corrects for static offsets generated by the
CCD and the LM9801 Because the LM9801 uses CDS to
eliminate the pixel-to-pixel offset errors of the CCD no pix-
el-rate offset correction is required
To use the Offset DAC and Offset Add bit for offset correc-
tion the offset errors (VOS1 and VOS2) must first be deter-
mined as shown in
Figure 6 This is done be measuring the
voltage at the PGA output using the ADC with a black im-
age on the CCD (a black image can usually be created sim-
TLH12814 – 33
FIGURE 6 Offset Calibration
ply by turning off the scanner’s illumination) If this voltage is
known with a PGA gain of 100VV (0 dB) and 295VV
(9 dB) then the offset errors (VOS1 and VOS2) can be deter-
mined from the following two equations
VADC1 e 1(VOS1 a VDAC1) a VOS2 a VDAC2
(PGA gain e 1)
VADC2 e 295(VOS1 a VDAC1) a VOS2 a VDAC2
(PGA gain e 295)
Solving for VOS1 and VOS2
VOS1 e (VADC2–VADC1)195–VDAC1
VOS2 e (295VADC1–VADC2)195–VDAC2
These equations were used to produce this procedure for
cancelling the LM9801’s offset errors Please note that all
voltages and measurements are in units of ADC LSBs to
simplify calibration
1 Set the VGA Gain to 1VV (VGA code e 0 LSBs)
2 Set the Offset DAC (VDAC1) to its maximum value
(a63 LSBs) to ensure the total offset is positive and
therefore measurable by the ADC
3 Set the Offset Add bit (VDAC2)to0
4 Set the PGA Gain to 1VV (PGA code e 0)
5 Digitize a black line
6 Calculate the average (in ADC LSBs) of all the valid
pixels in the black line and store that number as VADC1
7 Set the PGA Gain to 295VV (PGA code e 255)
8 Digitize a black line
9 Calculate the average (in ADC LSBs) of all the valid
pixels in the black line and store that number as VADC2
10 Calculate VOS1
VOS1 e (VADC2–VADC1)195–63
11 Program the Offset DAC register using the formula
Offset DAC code e -(VOS1)(1563)
e
(63 a (VADC1–VADC2)195)(1563)
e
15 a 122(VADC1–VADC2)
(Note This calculation can be done as
15 a 39(VADC1–VADC2)32
for ease of programming in 8-bit microcontrollers)
12 If 3VADC1 l VADC2 then set the Offset Add bit to 0
If 3VADC1 k VADC2 set the Offset Add bit to 1
13 The final value of the offset present at the ADC input
can be used for the shading calibration calculations
Calculate the final value of the ADC input offset
(VOFFSET) using
VOFFSET e (3VADC1–VADC2)2
(if the Offset Add bit is 0) or
VOFFSET e (3VADC1–VADC2)2 a 2
(if the Offset Add bit is 1)
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