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dc1563af

DEMO MANUAL DC1563A

HARDWARE SETUP

Signal Connections

J1: CLK IN. This input has a 50Ω termination resistor,

and is intended to be driven by a low jitter, 10dBm sine or

square wave. To achieve full AC performance of this part,

the clock jitter should be kept under 20ps. This input is

capacitively coupled so that the input clock can be either

0V to 3.3V or ±1.65V. This eliminates the need for level

shifting. To run at the maximum conversion rate, apply

the clock frequency specified in the Table 1.

J2: DC718 Interface. Connect to J7 of the DC718. Do not

connect to both the DC718 and the DC590 at the same

time. JP4 (VCCIO) should be set to 3.3V when interfacing

to a DC718.

J3: DC590 Interface. Connect to J4 of the DC590 with the

supplied 14-pin cable. Do not connect to both the DC590

and the DC718 at the same time. Make sure that VCCIO

of the DC590 is set to 3.3V.

J4: AIN. Analog input of the DC1563A. Keep input voltage

swings between GND and REF. For optimum performance,

this input should be band limited to the frequencies of

interest. The default filter comprised of R15 and C19 has

a bandwidth of 67.8MHz.

J5: JTAG. Factory Use Only.

JP1 Coupling. Use this jumper to select AC or DC cou-

pling of AIN. The default setting is AC. At very low input

frequencies,usingACcouplingmaydegradethedistortion

performance. When using AC coupling make sure that

JP2(VCM) is set to half the REF value.

JP2: VCM. Use this jumper to set the DC bias point for

AIN of the LTC2315 when JP1 (Coupling) is in the AC

position. 2.048V is the default setting. Jumpers VCM

point (VCM) is half of the REF voltage.

that the DC bias point (VCM) is half of the REF voltage.

JP4: VCCIO. Use this jumper to set VCCIO to 3.3V or 2.5V.

the logic high voltage of the LTC2315 SDO pin and the

thresholds of the LTC2315 digital inputs.