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LT8362 Datasheet(PDF) 13 Page - Linear Technology |
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LT8362 Datasheet(HTML) 13 Page - Linear Technology |
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13 / 32 page ![]() LT8362 13 8362fa For more information www.linear.com/LT8362 Figure 3. Soft-Start Waveforms APPLICATIONS INFORMATION FAULT PROTECTION An inductor overcurrent fault (> 3.75A) and/or INTVCC undervoltage (INTVCC < 2.5V) and/or thermal lockout (TJ > 170°C) will immediately prevent switching, will reset the SS pin and will pull down VC. Once all faults are removed, the LT8362 will soft-start VC and hence inductor peak current. FREQUENCY FOLDBACK During start-up or fault conditions in which VOUT is very low, extremely small duty cycles may be required to main- tain control of inductor peak current. The minimum on- time limitation of the power switch might prevent these low duty cycles from being achievable. In this scenario inductor current rise will exceed inductor current fall during each cycle, causing inductor current to “walk up” beyond the switch current limit. The LT8362 provides protection from this by folding back switching frequency whenever FBX or SS pins are close to GND (low VOUT levels or start-up). This frequency foldback provides a larger switch-off time, allowing inductor current to fall enough each cycle (see Normalized Switching Frequency vs FBX Voltage in the Typical Performance Characteristics section). THERMAL LOCKOUT If the LT8362 die temperature reaches 170°C (typical), the part will stop switching and go into thermal lockout. When the die temperature has dropped by 5°C (nominal), the part will resume switching with a soft-started inductor peak current. COMPENSATION Loop compensation determines the stability and transient performance. The LT8362 uses current mode control to regulate the output which simplifies loop compensation. The optimum values depend on the converter topology, the component values and the operating conditions (including the input voltage, load current, etc.). To compensate the feedback loop of the LT8362, a series resistor-capacitor network is usually connected from the VC pin to GND. The Block Diagram shows the typical VC compensation network. For most applications, the capacitor should be in the range of 100pF to 10nF, and the resistor should be in the range of 5k to 100k. A small capacitor is often connected in parallel with the RC compensation network to attenuate the VC voltage ripple induced from the out- put voltage ripple through the internal error amplifier. The parallel capacitor usually ranges in value from 2.2pF to 22pF. A practical approach to designing the compensa- tion network is to start with one of the circuits in this data sheet that is similar to your application, and tune the com- pensation network to optimize the performance. Stability should then be checked across all operating conditions, including load current, input voltage and temperature. Application Note 76 is a good reference. THERMAL CONSIDERATIONS Care should be taken in the layout of the PCB to ensure good heat sinking of the LT8362. Both packages have an exposed pad underneath the IC which is the best path for heat out of the package. The exposed pad should be soldered to a continuous copper ground plane under the device to reduce die temperature and increase the power capability of the LT8362. The ground plane should be connected to large copper layers to spread heat dissi- pated by the LT8362. Power dissipation within the LT8362 (PDISS_LT8362) can be estimated by subtracting the induc- tor and Schottky diode power losses from the total power losses calculated in an efficiency measurement. The junc- tion temperature of LT8362 can then be estimated by: TJ(LT8362) = TA + θJA • PDISS_LT8362 500µs/DIV VOUT 20V/DIV IL 1A/DIV 8362 F03 |
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