COP682C datasheet(16/30 Pages) NSC

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Functional Description (Continued)

TABLE V Timer Operating Modes

CNTRL

Timer

Bits

Operation Mode

T Interrupt

Counts

765

0 0 0

External Counter WAuto-Load Reg

Timer Underflow

TIO Pos Edge

0 0 1

External Counter WAuto-Load Reg

Timer Underflow

TIO Neg Edge

0 1 0

Not Allowed

0 1 1

Not Allowed

1 0 0

Timer WAuto-Load Reg

Timer Underflow

1 0 1

Timer WAuto-Load RegToggle TIO Out

Timer Underflow

1 1 0

Timer WCapture Register

TIO Pos Edge

1 1 1

Timer WCapture Register

TIO Neg Edge

TLDD10802 – 11

FIGURE 9 TimerCounter Auto

Reload Mode Block Diagram

TLDD10802 – 12

FIGURE 10 Timer Capture Mode Block Diagram

TIMER PWM APPLICATION

Figure 11 shows how a minimal component DA converter

can be built out of the Timer-Register pair in the Auto-Re-

load mode The timer is placed in the ‘‘Timer with auto re-

load’’ mode and the TIO pin is selected as the timer output

At the outset the TIO pin is set high the timer T1 holds the

on time and the register R1 holds the signal off time Setting

TRUN bit starts the timer which counts down at the instruc-

tion cycle rate The underflow toggles the TIO output and

copies the off time into the timer which continues to run By

alternately loading in the on time and the off time at each

successive interrupt a PWM frequency can be easily gener-

ated

TLDD10802 – 13

FIGURE 11 Timer Application

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