3

510 - 78 - 06

V

REG

3µ3

S3

V19

S2

R

2R

R

13

9

18

19

22

5

7

11

21

20

6

GND

D

OUT

IN

LPFB

HP

HPFB

V

CC

P GND

12

V

CC

2k2

0.6 V

R

IN

26

27 1

30

31

10K

B

OUT

B

AGC

C

68n

68n

10n 10n

LIN/LOG

CONVERTER

LIN/LOG

CONVERTER

+

-

HP

FILTER

+ -

V

REG

A

IN

V

CC

2k2

V15

-

+

-

+

1.3V

S4

S1

S2

S3

V14

I14

40K

R

IN14

10K

VOLTAGE

REGULATOR

14

13

9

15

5

7

11

6

GND

D

OUT

OUT

A

OUT

V

CC

P GND

12

3µ3

26

27 1

10K

B

OUT

B

AGC

C

68n

68n

10n

10n

31

30

+

-

PREAMP

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Quiescent Voltage on Pad 18

V

Q18

-

650

-

mV

Quiescent Voltage on Pad 19

V

Q19

-

650

-

mV

Quiescent Voltage on Pad 20

V

Q20

-

550

-

mV

Maximum DC Current from Pad 19

I

HP MAX

I

HP

= 0

-2

-

µA

Minimum DC Current from Pad 19

I

HP MIN

I

HP

=1.875 x I

R

(S3 closed)

-

200

-

nA

Buffer Gain

GAIN

V

19

= V

100mV

(S2 closed)

-0

-

dB

Input Resistance Pad 20

R

IN20

I

HP

= I

R

-13

-

k

Ω

All switches remain OPEN unless otherwise stated in CONDITIONS column.

HIGH PASS FILTER

Fig. 2 High Pass Filter DC Test Circuit

Fig. 1 Preamplifier and Regulator Test Circuit

All resistors in ohms, all capacitors in

farads unless otherwise stated.

All resistors in ohms, all capacitors in

farads unless otherwise stated.