4

510 - 78 - 06

S1

V

CC

2k2

V

REG

3µ3

R

R

13

9

22

24

26

27

1

11

16

21

6

GND

D

OUT

OUT

10K

AGC

RECT.

IN

BUFFER

OUT

BUFFER

IN

+

-

LP

FILTER

LPFB

V

CC

P GND

12

LIN/LOG

CONVERTER

V26

-

+

-

+

V24

S2

S3

+1.3 V

0.6 V

C

68n

68n

10n

10n

57

B

B

IN

30

31

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Quiescent Voltage on Pad 21

V

Q21

-

550

-

mV

Quiescent Voltage on Pad 22

V

Q22

-

650

-

mV

Quiescent Voltage on Pad 24

V

Q24

-

650

-

mV

Quiescent Voltage on Pad 26

V

Q26

-

650

-

mV

Maximum DC Current from Pad 22

I

LP MAX

I

LP

= 0

µA (S1 closed)

-

2.0

-

µA

Minimum DC Current from Pad 22

I

LP MIN

I

LP

=1.875 x I

R

(S1 closed)

-

0.7

-

µA

Output Swing High (Pad 26)

V

OH

V

24

= V

Q24

-

100

-

mV

Output Swing Low (Pad 26)

V

OL

V

24

= V

Q24

-

-100

-

mV

Max Sinking Current from Pad 26

I

SINK

V

V

30

-

-

µA

(S2, S3 closed)

Max Sourcing Current to Pad 26

I

SOURCE

V

V

-30

-

-

µA

(S2, S3 closed)

Buffer Gain

GAIN

V

26

= V

100mV

-

0

-

dB

Input Resistance (Pad 21)

R

IN21

I

LP

= I

R

-13

-

k

Ω

NOTE: 1. V

OH

= V

OL

= V

P26

- V

Q26

All switches remain OPEN unless otherwise stated in CONDITIONS column.

LOW PASS FILTER

Fig. 3 Low Pass Filter DC Test Circuit

All resistors in ohms, all capacitors in

farads, unless otherwise stated.