6

510 - 78 - 06

1.3 V

V

CC

2k2

3µ3

FULL WAVE

RECTIFIER

THRESHOLD

RF

LIN/LOG

CONVERTER

VOLTAGE

REGULATOR

R

R

14

13

9

22

24

26

27

13

57

11

23

2

25

6

GND

I

THRESH

D

OUT

IN

DELTA

OUT

C

AGC

RECT.

IN

BUFFER

OUT

BUFFER

IN

+

-

LP

FILTER

LPFB

P GND

12

S1

10µ

68n

V

IN

R1=1M

V

REG

AVERAGING

CIRCUIT

I

THRESH

10k

B

OUT

B

0.1

V

O

+12V

LT001

-

+

2

3

7

6

4

-12V

68n

10n

31

30

AGC

10n

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Quiescent Voltage on Pad 2

V

Q2

I

THRESH

= I

R

-

400

-

mV

Quiescent Voltage on Pad 3

V

Q3

I

GAIN

= I

R

x 1.875

-

700

-

mV

Quiescent Voltage on Pad 23

V

Q23

-

500

-

mV

Quiescent Voltage on Pad 25

V

Q25

-

500

-

mV

Quiescent Voltage on Pad 27

V

Q27

-

600

-

mV

Release Current Max (Pad 1)

I

REL MAX

I

REL

= 0 (S1 closed)

-

300

-

nA

Release Current Min

(Pad 1)

I

REL MIN

I

REL

= 1.875 x I

R

(S1 closed)

-

30

-

nA

Input Resistance

(Pad 25)

R

IN25

I

REL

= I

R

-17

-

k

Ω

Input Resistance

(Pad 27)

R

IN27

I

27

=

± I

R

-4

-

k

Ω

O

)

G

MAX

I

GAIN

=I

R

x

P26

-

160

-

µA/V

I

Gain Range (Pad 26 to V

o

)

GAIN

RANGE

I

-

33

-

dB

V

pp

Output Limiting Level (Pad 3)

OUT

LIM

I

-

0.7

-

V

pp

(Note 3)

Limiting Level Range

LIM

RANGE

I

x

-

13

-

dB

V

pp

AGC Compression Ratio

CMP

RAT

I

THRESH

=I

R

I

-

5

-

NOTES:

1. G

MAX

= V

o

/ (V

26

x 1M)

2. GAIN

RANGE

= 20 LOG ( V

o

[

I

]/ V

o

[

I

3. OUT

LIM

= V

o

/ 1M

10

20 LOG (V

o

26

o

[V

26

AGC CONTROL STAGE

Unless otherwise stated in CONDITIONS column all switches remain OPEN, all current sources are 0

µA

4. LIM

RANGE

= 20 LOG (V

o

[I

/V

o

[I

)

5. CMP

RAT

=

Fig. 7 AGC Control Stage Test Circuit

-45dBV

-35dBV

All resistors in ohms, all capacitors in

farads unless otherwise stated.