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LTM4649

4649fc

For more information www.linear.com/LTM4649

APPLICATIONS INFORMATION

high current loads. It is very important that the DIFFP and

DIFFN are connected properly at the output, and DIFFOUT

is connected to VOUT_LCL. Review the parallel schematics

in Figures 19 and 20.

SW Pins

The SW pin is generally used for testing purposes. The

SW pin can also be used to dampen out switch node ring-

ing caused by LC parasitic in the switched current path.

Usually a series R-C combination is used, referred to as a

snubbercircuit.Theresistorwilldampentheresonanceand

the capacitor is chosen to only affect the high frequency

ringing across the resistor.

If the stray inductance or capacitance can be measured

or approximated then a somewhat analytical technique

can be used to select the snubber values. The inductance

is usually easier to determine. It combines the power

path board inductance in combination with the MOSFET

interconnect bond wire inductance.

First the SW pin can be monitored using a wide band-

width scope with a high frequency scope probe. The ring

frequency can be measured for its value. The impedance

Z can be calculated:

ZL = 2π • f • L

where f is the resonant frequency of the ring, and L is the

total parasitic inductance in the switch path. If a resistor

is selected that is equal to Z, then the ringing should be

dampened. The snubber capacitor value is chosen so that

its impedance is equal to the resistor at the ring frequency.

Calculated by:

ZC =

π • f • C

These values are a good place to start. Modification to

these components should be made to attenuate the ring-

ing with the least amount of power loss.

Temperature Monitoring

A diode connected PNP transistor is used for the TEMP

monitor function by monitoring its voltage over tempera-

ture. The temperature dependence of this diode voltage

can be understood in the equation:

VD = nVT ln













where VT is the thermal voltage (kT/q), and n, the ideality

factor, is 1 for the diode connected PNP transistor be-

ing used in the LTM4649. IS is expressed by the typical

empirical equation:

IS =I0 exp

–VG0













where I0 is a process and geometry dependent current, (I0

is typically around 20k orders of magnitude larger than IS

at room temperature) and VG0 is the band gap voltage of

1.2V extrapolated to absolute zero or –273°C.

If we take the IS equation and substitute into the VD equa-

tion, then we get:

VD = VG0 –











 ln











,VT =

The expression shows that the diode voltage decreases

(linearly if I0 were constant) with increasing temperature

and constant diode current. Figure 7 shows a plot of VD

vs Temperature over the operating temperature range of

the LTM4649.

If we take this equation and differentiate it with respect to

temperature T, then:

dVD

= −

VG0 − VD

This dVD/dT term is the temperature coefficient equal to

about –2mV/K or –2mV/°C. The equation is simplified for

the first order derivation.

Solving for T, T = –(VG0 – VD)/(dVD/dT) provides the

temperature.

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