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LTM4628 Datasheet(PDF) 8 Page - Linear Technology

Part # LTM4628
Description  Dual 25A or Single 50A 關Module Regulator with 0.8% DC and 3% Transient Accuracy
PDF  36 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTM4628 Datasheet(HTML) 8 Page - Linear Technology

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LTM4650-1
8
46501fc
For more information www.linear.com/LTM4650-1
pin FuncTions
MODE_PLLIN (F4): Force Continuous Mode, Burst Mode
Operation, or Pulse-Skipping Mode Selection Pin and
External Synchronization Input to Phase Detector Pin.
Connect this pin to SGND to force both channels into
force continuous mode of operation. Connect to INTVCC
to enable pulse-skipping mode of operation. Leaving the
pin floating will enable Burst Mode operation. A clock on
the pin will force both channels into continuous mode of
operation and synchronized to the external clock applied
to this pin.
RUN1, RUN2 (F5, F9): Run Control Pin. A voltage above
1.25V will turn on each channel in the module. A voltage
below 1.25V on the RUN pin will turn off the related chan-
nel. Each RUN pin has a 1µA pull-up current, once the
RUN pin reaches 1.2V an additional 4.5µA pull-up current
is added to this pin.
DIFFOUT (F8): Internal Remote Sense Amplifier Output.
Connect this pin to VOUTS1 or VOUTS2 depending on which
output is using remote sense. In parallel operation con-
nect one of the VOUTS pin to DIFFOUT for remote sensing.
SW1, SW2 (G2, G11): Switching node of each channel
that is used for testing purposes. Also an R-C snubber
network can be applied to reduce or eliminate switch node
ringing, or otherwise leave floating. See the Applications
Information section.
PHASMD(G4):ConnectthispintoSGND,INTVCC,orfloat-
ing this pin to select the phase of CLKOUT to 60 degrees,
120 degrees, and 90 degrees respectively.
CLKOUT (G5): Clock output with phase control using the
PHASMD pin to enable multiphase operation between
devices. See the Applications Information section.
PGOOD1, PGOOD2 (G9, G8): Output Voltage Power
Good Indicator. Open drain logic output that is pulled to
ground when the output voltage is not within ±10% of
the regulation point.
INTVCC (H8): Internal 5V Regulator Output. The control
circuits and internal gate drivers are powered from this
voltage. Decouple this pin to PGND with a 4.7µF low ESR
tantalumorceramic.INTVCCisactivatedwheneitherRUN1
or RUN2 is activated.
TEMP (J6): Temperature Monitor. An internal diode con-
nected NPN transistor between this pin and SGND with
10nF filtering capacitor. See the Applications Information
section.
EXTVCC (J7): External power input that is enabled through
a switch to INTVCCwhenever EXTVCC is greater than 4.7V.
Do not exceed 6V on this input, and connect this pin to
VIN when operating VIN on 5V. An efficiency increase will
occur that is a function of the (VIN – INTVCC) multiplied by
powerMOSFETdrivercurrent.Typicalcurrentrequirement
is 30mA. VIN must be applied before EXTVCC, and EXTVCC
must be removed before VIN.
VIN (M2-M11, L2-L11, J2-J4, J9-J11, K2-K4, K9-K11):
Power Input Pins. Apply input voltage between these pins
and GND pins. Recommend placing input decoupling
capacitance directly between VIN pins and GND pins.
(Recommended to Use Test Points to Monitor Signal Pin Connections.)



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