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LTM4613 Datasheet(PDF) 10 Page - Linear Technology

Part # LTM4613
Description  EN55022B Compliant 58V, 24W Inverting-Output DC/DC 關Module Regulator
PDF  34 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTM4613 Datasheet(HTML) 10 Page - Linear Technology

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LTM4651
10
4651f
For more information www.linear.com/LTM4651
SIMPLIFIED BLOCK DIAGRAM
TEMP– (J2, J7): Temperature Sensor, Negative Input.
Collector and base of a 2N3906-genre PNP bipolar junc-
tion transistor (BJT). Optionally interface to temperature
monitoringcircuitrysuchasLTC2997, LTC2990,LTC2974
or LTC2975. Otherwise leave electrically open. Pins J2
and J7 are electrically connected together internal to the
LTM4651, and thus it is only necessary to connect one
TEMP– pin to monitoring circuitry. The remaining TEMP–
pin can be used for redundant connectivity or routed to an
ICTtestpointfordesign-for-testconsiderations,asdesired.
SW (H4): Switching Node of Switching Converter Stage.
Used for test purposes. May be routed a short distance
with a thin trace to a local test point to monitor switching
action of the converter, if desired, but do not route near any
sensitivesignals;otherwise,leaveelectricallyopencircuit.
NC (A6 – 7, B2, B6 – 7, C1, C6 – 7, D6 – 7, E6 – 7, F6 – 7,
G6 – 7, H6 – 7, K6 – 7, L6 – 7): No Connect Pins, i.e., Pins
with No Internal Connection. The NC pins predominantly
serve to provide improved mounting of the module to the
board. In one’s layout, NC pins are permitted to remain
electrically unconnected or can be connected as desired,
e.g., connected to a VOUT– plane for heat-spreading pur-
poses and/or to facilitate routing.
PIN FUNCTIONS
4651 BD
ISETb
RUN:
>1.2VTYP = ON
<1.07VTYP = OFF
1µF
CINH
SVIN
MT
MB
CINL
POWER CONTROL
AND ANALOG CIRCUITS
PGND
VOUT–
VIN
3.6V
TO 58V
SW
PGDFB
VOUT–
GND
COMPa
COMPb
INTVCC
fSET
10pF
1.5nF
10nF
50Ω
VOUT–
249k
+– 2V
+
–
4.99k
220pF
PGOOD
LOGIC
VOUT–
0.1F
1Ω
400nH
4H
TEMP–
TEMP+
SVOUT–
0.1F
VIN
VD
0.1F
RISET
GNDSNS
TO CURRENT COMPARATORS,
PWM AND FET DRIVERS
HI-Z WHEN
VPGDFB – SVOUT–
IS WITHIN
0.6V ±7.5%
RPGDFB
LOAD-LOCAL
MLCCs (HIGH-
FREQUENCY
DECOUPLING)
VOUT–
UP TO 0A
DOWN TO (VIN–58V),
NO EXCEEDING 26V
BELOW PGND
COUTH
CD
4.7F
×2
CDGND*
+
ERROR
AMPLIFIER
50A
+
–
RUN
(REFERRED
TO GND)
CLKIN
(REFERRED
TO GND)
EXTVCC
ISETa
NC
RISET =
| VOUT– |
50µA
400kHz
DEFAULT
SVOUT–
100Ω
VINREG
COMP
BUFFER
PGOOD
(REFERRED
TO GND)
(CENTRALLY
LOCATED PNP
TEMP SENSOR)
IL
CINOUT*
*CINOUT and CDGND OPTIONAL, FOR REDUCED
RADIATED EMI. SEE FIGURES 5 THROUGH 8.
ISVIN
ISVOUT–
LOAD



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