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LTM4613 Datasheet(PDF) 14 Page - Linear Technology

Part # LTM4613
Description  EN55022B Compliant 58V, 24W Inverting-Output DC/DC 關Module Regulator
PDF  34 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTM4613 Datasheet(HTML) 14 Page - Linear Technology

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LTM4651
14
4651f
For more information www.linear.com/LTM4651
APPLICATIONS INFORMATION
Input Capacitors
TheLTM4651achieveslowinputconductedEMInoisedue
to tight layout and high-frequency bypassing of MOSFETs
MT and MB within the module itself. A small filter induc-
tor (400nH) is integrated in the input line (from VIN to VD)
provides further noise attenuation—again, local to the
switching MOSFETs. The VD and VIN pins are available
for external input capacitors—VD and VINH—to form a
high-frequency � filter. As shown in the Simplified Block
Diagram, the ceramic capacitor CD on the LTM4651’s VD
pins handles the majority of the RMS current into the DC/
DC converter power stage and requires careful selection,
for that reason.
TomeettheradiatedemissionsrequirementsofEN55022B,
anadditionalfiltercapacitor,CINOUT,isneeded—connecting
fromVINtoVOUT–.SeeFigures5to 8forEMIperformance.
The input capacitance, CD, is needed to filter the pulsed
current drawn by MT. To prevent excessive voltage sag
on VD, a low-effective series resistance (low-ESR) input
capacitor should be used, sized appropriately for the
maximum CD RMS ripple current:
ICD(RMS) =IPK • D• (1–D)
(6)
ICD(RMS) is maximum for D = 1/2. For D = 1/2,
ICD(RMS) = 1/2 • IPK or 3A. This simplification of the worst-
case condition is commonly used for design purposes
because even significant deviations in D do not offer much
relief, in practice. Furthermore: note that ripple current
ratings from capacitor manufacturers are often based on
2000 hours of life; therefore, it is advisable to significantly
over-designCD,and/orchooseacapacitorratedatahigher
temperature than required. Err on the side of caution and
contact the capacitor manufacturer to understand the
capacitor vendor’s derating methodology.
Several capacitors may be paralleled to meet the applica-
tion’s targetsize,height,andCDRMSripplecurrentrating.
For lower input voltage applications, sufficient bulk input
capacitance is needed for CINL to counteract line sag and
transient effects during output load changes. Suggested
values for CD and CINH are found in Table 8. Take note
that CD is connected from VD to VOUT–, whereas CINH and
CINL are connected from VIN to PGND; this is deliberate.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM4651’s VIN,
SVIN,andVDpins.Aceramicinputcapacitorcombinedwith
trace or cable inductance forms a high Q (underdamped)
tank circuit. If the LTM4651 circuit is plugged into a live
supply, the input voltage can ring to twice its nominal
value, possibly exceeding the device’s rating. This situa-
tion is easily avoided; see the Hot-Plugging Safely section.
Output Capacitors
Output capacitors COUTHandCOUTLareappliedtoVOUT–of
theLTM4651:sufficientcapacitanceandlowESRarecalled
for, to meet the output voltage ripple, loop stability, and
transient requirements. COUTL can be a low ESR tantalum
or polymer capacitor. COUTH is a ceramic capacitor. The
typical output capacitance is 22μF (type X5R material, or
better), if ceramic-only output capacitors are used.
For highest reliability designs, polarized output capacitors
(VOUTL) are not recommended, as there is a possibility of
a diode-drop of reverse voltage appearing transiently on
VOUT– during rapid application of input voltage or when
RUNistoggledlogichigh(seeFigures33).Whenpolarized
capacitorsareusedonVOUT–,contactthecapacitorvendor
to understand what reverse voltage their polarized capaci-
tor can withstand. Be advised, polarized capacitor reverse
voltage rating is sometimes temperature-dependent.
Output voltage ripple (∆VOUT(PK-PK)–) is governed by
charge lost in COUTH and COUTL while MT is on, in addition
to the contribution of a resistive drop across the ESR of
the output capacitors. This is expressed by:
∆VOUT(PK–PK) ≈
ILOAD •D
COUT • fSW
+ILOAD •ESR
D
(7)
Table 8 shows a matrix of suggested output capacitors
optimized for transient step-loads that are 50% of the full
load capability for that combination of VIN,VOUT–,andfSW.
The table optimizes total equivalent ESR and total bulk
capacitancetoyieldthestatedtransient-loadperformance.
Additional output filtering may be required by the system
designer, if further reduction of output ripple or dynamic
transient spike is required. The LTpowerCAD design tool
is available for transient and stability analysis.



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