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LTM4651

4651f

For more information www.linear.com/LTM4651

APPLICATIONS INFORMATION

Forced Continuous Operation

LeavetheCLKINpinopencircuittocommandtheLTM4651

for forced continuous operation. In this mode, the control

loop is allowed to command the inductor peak current

to approximately –1A, allowing for significant negative

average current.

Clocking the CLKIN pin at a frequency within ±40% of

the target switching frequency commanded by the fSET

pin synchronizes MT’s turn-on to the rising edge of the

CLKIN pin.

Output Voltage Programming, Tracking and Soft-Start

TheLTM4651regulatesitsoutputvoltage,VOUT–,according

tothedifferentialvoltagepresentacrossISETaandSVOUT–.

Inmostapplications,theoutputvoltageissetbysimplycon-

nectingaresistor,RSET,fromISETatoSVOUT–,accordingto:

RSET =

–VOUT–

50µA

(8)

Since the LTM4651 control loop servos its output volt-

age according to the voltage between ISETa and SVOUT–:

placing a capacitor, CSS, parallel to RSET configures the

ramp-up rate of ISETa and thus VOUT–. In the time domain,

the output voltage ramp-up after the RUN pin is toggled

from low to high (t = 0s) is given by:

VOUT(t)– =IISETa •RSET • 1–e

–

RSET •CSET

















(9)

The soft-start time, tSS, is defined as the time it takes for

VOUT– to ramp from 0V to 90% of its final value:

TSS = –RSET •CSET •In(1–0.9)

(10)

TSS =2.3 • RSET •CSET

(11)

A default value of CSET = 1.5nF can be implemented by

connecting ISETa to ISETb. For other ramp-up rates, con-

nect an external CSET capacitor parallel to RSET.

When starting up into a pre-biased VOUT–, the LTM4651

stays in a sleep mode, keeping MT and MB off until VISETa

equals VGNDSNS—after which, the DC/DC converter com-

mences switching action and VOUT– is ramped according

to the voltage commanded by ISETa.

Since the LTM4651 control loop servos its GNDSNS

voltage to match that of ISETa’s, the LTM4651’s output

can be configured to track any voltage applied to ISETa,

referenced to SVOUT–.

The LTM4651 can track the mirror-image of a positive rail

to generate the negative half of a split-supply, as seen in

Figure 37.

Optional Diodes to Guard Against Overstress

Just prior to output voltage start-up, a mechanism exists

whereby a diode-drop of reverse polarity can appear on

VOUT–. See the simplified Block Diagram and observe: just

prior to output voltage start-up, SVIN bias current (ISVIN)

flows through the module’s control IC, to SVOUT–; from

there, the bias current (now ISVOUT–) flows into VOUT– and

through MB’s body diode, to SW. This current (now IL)

continues to flow—though the 4μH power inductor—to

PGND and ground, closing the control IC bias circuit’s

path. It is this current through MB’s body diode that cre-

ates a diode-drop of reverse polarity (positive voltage) on

VOUT–, as shown in Figure 33. The voltage excursion is

highest when RUN toggles high because that is the instant

when INTVCC powers-up, with a corresponding increase

in ISVIN/ISVOUT–/IL current flow. With higher current flow,

the forward voltage drop (VF) of MB’s body diode—and

thus, the positive voltage excursion on VOUT– —is higher.

If this transient voltage excursion is unwelcome for the

load or polarized output capacitors, minimize it with a

low VFSchottkydiodethatstraddlesVOUT–andPGND(see

Figure 32 circuit and Figure 33 performance). Addition-

ally, the voltage excursion can be empirically reduced by

increasing output capacitance.

Lastly: in applications where it is anticipated that VIN may

be rapidly applied (e.g., <10μs) and CINOUT is used, the

resulting capacitor-divider network formed by CINOUT and

CINL||CINHmaytransientlydragVOUT–positive.Itisrecom-

mended to apply a low VF Schottky diode from VOUT– to

PGND, in such applications. The reverse mechanism ap-

plies, as well: in applications where it is anticipated that

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