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LT3088

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For more information www.linear.com/LT3088

APPLICATIONS INFORMATION

Thermal Considerations

The LT3088’s internal power and thermal limiting circuitry

protects itself under overload conditions. For continuous

normal load conditions, do not exceed the 125°C (E- and

I-grades) or 150°C (H- and MP-grades) maximum junc-

tion temperature. Carefully consider all sources of thermal

resistance from junction-to-ambient. This includes (but is

not limited to) junction-to-case, case-to-heat sink inter-

face, heat sink resistance or circuit board-to-ambient as

the application dictates. Consider all additional, adjacent

heat generating sources in proximity on the PCB.

Surface mount packages provide the necessary heat

sinking by using the heat spreading capabilities of the

PC board, copper traces and planes. Surface mount heat

sinks, plated through-holes and solder-filled vias can also

spread the heat generated by power devices.

Junction-to-case thermal resistance is specified from the

IC junction to the bottom of the case directly, or the bot-

tom of the pin most directly in the heat path. This is the

lowest thermal resistance path for heat flow. Only proper

device mounting ensures the best possible thermal flow

from this area of the packages to the heat sinking material.

Note that the exposed pad of the DFN package and the

tab of the DD-Pak and SOT-223 packages are electrically

connected to the output (VOUT).

Tables 3 through 5 list thermal resistance as a function

of copper areas on a fixed board size. All measurements

were taken in still air on a 4-layer FR-4 board with 1oz

solid internal planes and 2oz external trace planes with a

total finished board thickness of 1.6mm.

Table 3. DD Package, 8-Lead DFN

COPPER AREA

BOARD AREA

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)

TOPSIDE*

BACKSIDE

2500mm2

26°C/W

1000mm2

2500mm2

26°C/W

225mm2

2500mm2

28°C/W

100mm2

2500mm2

31°C/W

*Device is mounted on topside

Table 4. ST Package, 3-Lead SOT-223

COPPER AREA

BOARD AREA

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)

TOPSIDE*

BACKSIDE

2500mm2

23°C/W

1000mm2

2500mm2

23°C/W

225mm2

2500mm2

25°C/W

100mm2

2500mm2

27°C/W

*Device is mounted on topside

Table 5. M Package, 3-Lead DD-Pak

COPPER AREA

BOARD AREA

THERMAL RESISTANCE

(JUNCTION-TO-AMBIENT)

TOPSIDE*

BACKSIDE

2500mm2

13°C/W

1000mm2

2500mm2

14°C/W

225mm2

2500mm2

16°C/W

*Device is mounted on topside

For further information on thermal resistance and using

thermal information, refer to JEDEC standard JESD51,

notably JESD51-12.

PCB layers, copper weight, board layout and thermal vias

affect the resultant thermal resistance. Tables 3 through 5

provide thermal resistance numbers for best-case 4-layer

boards with 1oz internal and 2oz external copper. Modern,

multilayer PCBs may not be able to achieve quite the same

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