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LT1355 Datasheet(PDF) 1 Page - Linear Technology |
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LT1355 Datasheet(HTML) 1 Page - Linear Technology |
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1 / 40 page  LTC2358-16 1 Rev A For more information www.analog.com Document Feedback All registered trademarks and trademarks are the property of their respective owners. Protected by U.S. Patents, including 7705765, 7961132, 8319673, 9197235. TYPICAL APPLICATION FEATURES DESCRIPTION Buffered Octal, 16-Bit, 200ksps/Ch Differential ±10.24V ADC with 30VP-P Common Mode Range The LTC®2358-16 is a 16-bit, low noise 8-channel simulta- neous sampling successive approximation register (SAR) ADC with buffered differential, wide common mode range picoamp inputs. Operating from a 5V low voltage supply, flexible high voltage supplies, and using the internal refer- enceandbuffer,eachchannelofthisSoftSpanTMADCcanbe independently configured on a conversion-by-conversion basis to accept ±10.24V, 0V to 10.24V, ±5.12V, or 0V to 5.12V signals. Individual channels may also be disabled to increase throughput on the remaining channels. The integrated picoamp-input analog buffers, wide input commonmoderangeand128dBCMRRoftheLTC2358-16 allow the ADC to directly digitize a variety of signals us- ing minimal board space and power. This input signal flexibility, combined with ±1LSB INL, no missing codes at 16 bits, and 94.2dB SNR, makes the LTC2358-16 an ideal choice for many high voltage applications requiring wide dynamic range. The LTC2358-16 supports pin-selectable SPI CMOS (1.8V to 5V) and LVDS serial interfaces. Between one and eight lanes of data output may be employed in CMOS mode, allowing the user to optimize bus width and throughput. APPLICATIONS n 200ksps per Channel Throughput n Eight Buffered Simultaneous Sampling Channels n 500pA/12nA Max Input Leakage at 85°C/125°C n ±1LSB INL (Maximum, ±10.24V Range) n Guaranteed 16-Bit, No Missing Codes n Differential, Wide Common Mode Range Inputs n Per-Channel SoftSpan Input Ranges: ±10.24V, 0V to 10.24V, ±5.12V, 0V to 5.12V ±12.5V, 0V to 12.5V, ±6.25V, 0V to 6.25V n 94.2dB Single-Conversion SNR (Typical) n −111dB THD (Typical) at fIN = 2kHz n 128dB CMRR (Typical) at fIN = 200Hz n Rail-to-Rail Input Overdrive Tolerance n Integrated Reference and Buffer (4.096V) n SPI CMOS (1.8V to 5V) and LVDS Serial I/O n Internal Conversion Clock, No Cycle Latency n 219mW Power Dissipation (27mW/Ch Typical) n 48-Lead (7mm x 7mm) LQFP Package n Programmable Logic Controllers n Industrial Process Control n Power Line Monitoring n Test and Measurement Integral Nonlinearity vs Output Code and Channel ±10.24V RANGE TRUE BIPOLAR DRIVE (IN– = 0V) ALL CHANNELS OUTPUT CODE –32768 –16384 0 16384 32768 –1.00 –0.75 –0.50 –0.25 0 0.25 0.50 0.75 1.00 235816 TA01b 0.1µF 2.2µF 0.1µF 0.1µF 1.8V TO 5V 5V 15V –15V SAMPLE CLOCK 235816 TA01a S/H S/H S/H S/H S/H S/H S/H S/H MUX VCC VDD VDDLBYP OVDD BUFFERS EIGHT BUFFERED SIMULTANEOUS SAMPLING CHANNELS DIFFERENTIAL INPUTS IN+/IN– WITH WIDE INPUT COMMON MODE RANGE FULLY DIFFERENTIAL +10V 0V –10V TRUE BIPOLAR +10V 0V –10V ARBITRARY +10V 0V –10V UNIPOLAR +5V 0V –5V SDO0 SDO7 SCKO SCKI SDI CS BUSY CNV LVDS/CMOS PD IN0+ IN0– IN7+ IN7– 16-BIT SAR ADC CMOS OR LVDS I/O INTERFACE 0.1µF REFIN 47µF 0.1µF GND REFBUF VEE LTC2358-16 |
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