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LT1355 Datasheet(PDF) 5 Page - Linear Technology |
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LT1355 Datasheet(HTML) 5 Page - Linear Technology |
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5 / 40 page ![]() LTC2358-16 5 Rev A For more information www.analog.com DIGITAL INPUTS AND DIGITAL OUTPUTS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS CMOS Digital Inputs and Outputs VIH High Level Input Voltage l 0.8 • OVDD V VIL Low Level Input Voltage l 0.2 • OVDD V IIN Digital Input Current VIN = 0V to OVDD l –10 10 μA CIN Digital Input Capacitance 5 pF VOH High Level Output Voltage IOUT = –500μA l OVDD – 0.2 V VOL Low Level Output Voltage IOUT = 500μA l 0.2 V IOZ Hi-Z Output Leakage Current VOUT = 0V to OVDD l –10 10 μA ISOURCE Output Source Current VOUT = 0V –50 mA ISINK Output Sink Current VOUT = OVDD 50 mA LVDS Digital Inputs and Outputs VID Differential Input Voltage l 200 350 600 mV RID On-Chip Input Termination Resistance CS = 0V, VICM = 1.2V CS = OVDD l 90 106 10 125 Ω MΩ VICM Common-Mode Input Voltage l 0.3 1.2 2.2 V IICM Common-Mode Input Current VIN+ = VIN– = 0V to OVDD l –10 10 μA VOD Differential Output Voltage RL = 100Ω Differential Termination l 275 350 425 mV VOCM Common-Mode Output Voltage RL = 100Ω Differential Termination l 1.1 1.2 1.3 V IOZ Hi-Z Output Leakage Current VOUT = 0V to OVDD l –10 10 μA The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) POWER REQUIREMENTS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 9) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VCC Supply Voltage l 7.5 38 V VEE Supply Voltage l –16.5 0 V VCC − VEE Supply Voltage Difference l 10 38 V VDD Supply Voltage l 4.75 5.00 5.25 V IVCC Supply Current 200ksps Sample Rate, 8 Channels Enabled (Note 17) Acquisition Mode (Note 17) Nap Mode Power Down Mode l l l l 4.6 8.5 2.9 6 5.3 9.8 3.3 15 mA mA mA μA IVEE Supply Current 200ksps Sample Rate, 8 Channels Enabled (Note 17) Acquisition Mode (Note 17) Nap Mode Power Down Mode l l l l –5.5 –9.8 –3.5 –15 –4.5 –8 –2.8 –4 mA mA mA μA CMOS I/O Mode OVDD Supply Voltage l 1.71 5.25 V IVDD Supply Current 200ksps Sample Rate, 8 Channels Enabled 200ksps Sample Rate, 8 Channels Enabled, VREFBUF = 5V (Note 15) Acquisition Mode Nap Mode Power Down Mode (C-Grade and I-Grade) Power Down Mode (H-Grade) l l l l l l 15.6 13.8 2.1 1.7 106 106 18 16 2.7 2.4 275 500 mA mA mA mA μA µA |
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