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IMX7DCEC Datasheet(PDF) 4 Page - NXP Semiconductors |
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IMX7DCEC Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 158 page ![]() i.MX 7Dual introduction i.MX 7Dual Family of Applications Processors Datasheet, Rev. 5, 07/2017 NXP Semiconductors 4 Figure 1 describes the part number nomenclature so that the users can identify the characteristics of the specific part number. 1 Restricted electrical specifications for parts with CPU maximum frequency of 1.2 GHz: • Temperature range 0 to 85 degrees C (see Table 1) • VDD_ARM requirements (see Table 9) Figure 1. Part number nomenclature—i.MX 7Dual family of processors 1.2 Features The i.MX 7Dual family of processors is based on ARM Cortex-A7 MPCore™ Platform, which has the following features: • Two ARM Cortex-A7 Cores (with TrustZone® technology) • The core configuration is symmetric, where each core includes: — 32 KByte L1 Instruction Cache — 32 KByte L1 Data Cache — Private Timer and Watchdog — NEON MPE (media processing engine) coprocessor The ARM Cortex-A7 Core complex shares: • General interrupt controller (GIC) with 128 interrupt support • Global timer • Snoop control unit (SCU) • 512 KB unified I/D L2 cache |
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