GMS82512 datasheet(39/93 Pages) HYNIX

39 / 93 page

GMS82512/16/24

HYUNDAI MicroElectronics

FEB. 2000 Ver 1.00

Note: The contents of Timer data register TDRx should be

initialized 1H~FFH, not 0H, because it is undefined after re-

set.

In the Timer 0, timer register T0 increments from 00H until

it matches TDR0 and then reset to 00H. The match output

of Timer 0 generates Timer 0 interrupt (latched in T0IF bit)

As TDRx and Tx register are in same address, when read-

ing it as a Tx, written to TDRx.

In counter function, the counter is increased every 1-to-0

(falling edge) transition of EC0 pin. In order to use counter

function, the bit 4 of the Port mode register PMR4 are set

to “1”. The Timer 0 can be used as a counter by pin EC0

input, but Timer 1 can input by internal clock.

Figure 11-3 8-bit Timer/Counter 2, 3

Example 3:

Timer2 = 8-bit timer mode, 2ms interval at 8MHz

Timer3 = 8-bit timer mode, 500us interval at 8MHz

LDM

TDR2,#250

LDM

TDR3,#250

LDM

TM2,#0110_1111B

SET1

T2E

SET1

T3E

Example 4:

Timer2 = 8-bit event counter mode

Timer3 = 500us 8-bit timer mode at 8MHz

LDM

TDR2,#250

LDM

TDR3,#250

LDM

TM2,#0110_1100B

SET1

T2E

SET1

T3E

÷ 4

÷ 16

÷ 64

XIN PIN

MUX

T2IF

clear

0: Stop

1: Clear and start

T2ST

T2SL[1:0]

TIMER 2

INTERRUPT

T2CN

MUX

T3IF

clear

0: Stop

1: Clear and start

T3ST

T3SL[1:0]

TIMER 3

INTERRUPT

÷ 4

÷ 16

÷ 64

TDR2 (8-bit)

TDR3 (8-bit)

T3 (8-bit)

T2 (8-bit)

Comparator

TIMER 2

TIMER 3

T3O PIN

F/F

BTCL

54321

T3ST

CAP2

T2SL1

INITIAL VALUE: 00H

ADDRESS: 0E3H

TM2

T2SL0

T2CN

T2ST

T3SL1 T3SL0

X means don’t care

01 or 10 or 11

Reserved

GMS82512 Datasheet(PDF) 39 Page - Hynix Semiconductor

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