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ATSAM2133B Datasheet(PDF) 13 Page - ATMEL Corporation |
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ATSAM2133B Datasheet(HTML) 13 Page - ATMEL Corporation |
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13 / 22 page ![]() 13 ATSAM2133B 2694A–DRMSD–05/03 PC Host Interface Figure 4. Host Interface Read Cycle Figure 5. Host Interface Write Cycle Table 9. PC Host Interface Timing Parameters Symbol Parameter Min Typ Max Unit t AVCS Address valid to chip select low 0 - - ns t CSLRDL Chip select low to RD low 5 - - ns t RDHCSH RD high to CS high 5 - - ns t PRD RD pulse width 50 - - ns t RDLDV Data out valid from RD -- 20 ns t DRH Data out hold from RD 5- 10 ns t CSLRWRL Chip select low to WR low 5 - - ns t WRHCSH WR high to CS high 5 - - ns t PWR WR pulse width 50 - - ns t DWS Write data setup time 10 - - ns t DWH Write data hold time 0 - - ns t WRCYC Write cycle 128 - - tck A0 D0 - D7 tAVCS tCSLRDL tPRD tRDHCSH tRDLDV tDRH CS RD A0 D0 - D7 tAVCS tCSLWRL tPWR tWRHCSH tDWS tDWH CS RD tWRCVC |
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