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ATSAM2133B Datasheet(PDF) 14 Page - ATMEL Corporation |
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ATSAM2133B Datasheet(HTML) 14 Page - ATMEL Corporation |
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14 / 22 page  14 ATSAM2133B 2694A–DRMSD–05/03 External ROM/Flash Figure 6. ROM/Flash Read Cycle Table 10. External ROM/Flash Timing Parameters Symbol Parameter Min Typ Max Unit t RC Read cycle time 5 * t CK -6 * t CK ns t CSOE Chip select low/address valid to WOE low 2 * t CK - 5 - 3 * t CK + 5 ns t POE Output enable pulse width - 3 * t CK -ns t ACE Chip select/address access time 5 * t CK - 5 - - ns t OE Output enable access time 3 * t CK - 5 - - ns t DE Chip select or WOE high to input data Hi-Z 0- 2 * t CK - 5 ns tRC tCSOE tPOE tACE tOE tDE WA0 - WA21 WD0 - WD15 WCS0 WOE |
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