Low Cost, 225 MHz,

16 × 16 Crosspoint Switches

Data Sheet

AD8114/AD8115

Rev. C

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FEATURES

16 × 16 high speed nonblocking switch arrays

AD8114; G = 1

AD8115; G = 2

Serial or parallel programming of switch array

Serial data out allows daisy-chaining of multiple

16 × 16 arrays to create larger switch arrays

High impedance output disable allows connection of

multiple devices without loading the output bus

For smaller arrays see the AD8108/AD8109 (8 × 8) or

AD8110/AD8111 (16 × 8) switch arrays

Complete solution

Buffered inputs

Programmable high impedance outputs

16 output amplifiers, AD8114 (G = 1), AD8115 (G = 2)

Drives 150 Ω loads

Excellent video performance

25 MHz, 0.1 dB gain flatness

0.05%/0.05° differential gain/differential phase error

Excellent ac performance

−3 dB bandwidth: 225 MHz

Slew rate: 375 V/µs

Low power of 700 mW (2.75 mW per point)

Low all hostile crosstalk of −70 dB at 5 MHz

Reset pin allows disabling of all outputs (connected through

a capacitor to ground provides power-on reset capability)

100-lead LQFP (14 mm × 14 mm)

APPLICATIONS

Routing of high speed signals, including

Video (NTSC, PAL, S, SECAM, YUV, RGB)

Compressed video (MPEG, wavelet)

3-level digital video (HDB3)

Data communications

Telecommunications

GENERAL DESCRIPTION

The AD8114/AD8115 are high speed, 16 × 16 video crosspoint

switch matrices. They offer a −3 dB signal bandwidth greater than

200 MHz and channel switch times of less than 50 ns with 1%

settling. With −70 dB of crosstalk and −98 dB isolation (at 5 MHz),

the AD8114/AD8115 are useful in many high speed applications.

FUNCTIONAL BLOCK DIAGRAM

AD8114/AD8115

OUTPUT

BUFFER

G = +1,

G = +2

80

80

256

80-BIT SHIFT REGISTER

WITH 5-BIT

PARALLEL LOADING

PARALLEL LATCH

DECODE

16

× 5:16 DECODERS

16

CLK

DATA IN

UPDATE

CE

RESET

16 INPUTS

A0

DATA

OUT

16

OUTPUTS

SET

INDIVIDUAL

OR RESET

ALL OUTPUTS

TO "OFF"

A1

A2

SER/PAR D0 D1 D2 D3 D4

A3

SWITCH

MATRIX

Figure 1.

The differential gain and differential phase of better than 0.05%

and 0.05°, respectively, along with a 0.1 dB flatness out to 25 MHz

while driving a 75 Ω back-terminated load, make the AD8114/

AD8115 ideal for all types of signal switching.

The AD8114/AD8115 include 16 independent output buffers

that can be placed into a high impedance state for paralleling

crosspoint outputs so that off channels do not load the output bus.

The AD8114 has a gain of 1, while the AD8115 offers a gain of 2.

They operate on voltage supplies of ±5 V while consuming only

70 mA of idle current. The channel switching is performed via a

serial digital control (which can accommodate daisy-chaining of

several devices) or via a parallel control, allowing updating of an

individual output without reprogramming the entire array.

The AD8114/AD8115 is packaged in a 100-lead LQFP and is

available over the extended industrial temperature range of

−40°C to +85°C.