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MMRF1022HS Datasheet(PDF) 8 Page - NXP Semiconductors

Part # MMRF1022HS
Description  RF Power LDMOS Transistor
PDF  16 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMRF1022HS Datasheet(HTML) 8 Page - NXP Semiconductors

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RF Device Data
Freescale Semiconductor, Inc.
MMRF1022HS
Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD =28 Vdc, VGSB =0.8 Vdc, Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Output Power
P1dB
Zload (1)
(Ω)
Gain (dB)
(dBm)
(W)
ηD
(%)
AM/PM
(°)
2110
2.40 – j5.79
2.25 + j5.71
1.80 – j4.30
14.8
54.8
300
53.8
–26
2140
2.86 – j6.24
2.71 + j6.24
1.91 – j4.27
15.2
54.8
300
54.5
–27
2170
3.85 – j6.73
3.68 + j6.78
1.96 – j4.34
15.4
54.8
302
54.3
–28
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Output Power
P3dB
Zload (2)
(Ω)
Gain (dB)
(dBm)
(W)
ηD
(%)
AM/PM
(°)
2110
2.40 – j5.79
2.33 + j6.08
1.77 – j4.50
12.6
55.5
353
55.2
–33
2140
2.86 – j6.24
2.94 + j6.66
1.89 – j4.66
12.9
55.4
350
54.6
–34
2170
3.85 – j6.73
4.09 + j7.25
1.95 – j4.72
13.1
55.5
351
54.6
–35
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 10. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD =28 Vdc, VGSB =0.8 Vdc, Pulsed CW, 10 μsec(on), 10% Duty Cycle
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Drain Efficiency
P1dB
Zload (1)
(Ω)
Gain (dB)
(dBm)
(W)
ηD
(%)
AM/PM
(°)
2110
2.40 – j5.79
1.97 + j5.83
4.14 – j3.31
16.4
53.3
215
64.5
–33
2140
2.86 – j6.24
2.41 + j6.35
3.90 – j2.93
16.7
53.4
218
64.4
–34
2170
3.85 – j6.73
3.27 + j6.92
3.73 – j2.68
16.9
53.3
214
64.1
–35
f
(MHz)
Zsource
(Ω)
Zin
(Ω)
Max Drain Efficiency
P3dB
Zload (2)
(Ω)
Gain (dB)
(dBm)
(W)
ηD
(%)
AM/PM
(°)
2110
2.40 – j5.79
2.14 + j6.14
4.07 – j3.91
14.1
54.1
258
64.2
–40
2140
2.86 – j6.24
2.65 + j6.74
3.90 – j3.32
14.6
54.1
257
64.4
–43
2170
3.85 – j6.73
3.74 + j7.38
3.57 – j3.27
14.7
54.3
267
64.0
–43
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
Output Load Pull
Tuner and Test
Circuit



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