F

IN

Z

Noise Gain

1

Z

§

·

¨

¸

©

¹

Place gain and feedback resistors

close to pins to minimize stray

capacitance

Ground and power plane removed

from inner layers. Ground fill on

outer layers also removed

Ground and power plane exist on

inner layers.

Place bypass capacitor

close to power pins

Connect the thermal pad to the

negative supply pin

+

±

Representative schematic

1

8

2

7

3

6

4

5

Thermal

Pad

Connect PD to VS+ to enable the

amplifier

NC (Pin 2) isolates the IN- and FB

pins thereby reducing capacitive

coupling

21

OPA855

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12.2 Layout Example

Figure 19. Layout Recommendation

When configuring the OPA855 as a transimpedance amplifier additional care must be taken to minimize the

inductance between the avalanche photodiode (APD) and the amplifier. APD packaging can be quite large which

often requires the APD to be placed further away from the amplifier than ideal. The added distance between the

two device results in increased inductance between the APD and op amp feedback network as shown in

Figure 20. The added inductance is detrimental to a decompensated amplifiers stability since it isolates the APD

capacitance from the transimpedance amplifier's noise-gain equation. The noise-gain is given by Equation 3. The

added PCB trace inductance between the feedback network increases the denominator in Equation 3 thereby

reducing the noise-gain and the phase margin. In cases where a leaded APD in a TO can is used inductance

should be further minimized by cutting the leads of the TO can to be as short as possible.

The layout shown in Figure 20 can be improved by following some of the guidelines shown in Figure 21. The two

key rules to follow are:

•

between 10 Ω -20 Ω. The resistor dampens the potential resonance caused by the trace inductance and the

amplifiers internal capacitance.

•

This ensures a more balanced layout and reduces the inductive isolation between the APD and the feedback

network.

where