LTC1608 datasheet(13/20 Pages) LINER

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LTC1608

APPLICATIO S I FOR ATIO

12k

16k

REFERENCE

AMP

µF

REFCOMP

AGND

VREF

7.5k

2.500V

4.375V

LTC1608

1608 F12a

BANDGAP

REFERENCE

Figure 12a. LTC1608 Reference Circuit

0.1

µF

ANALOG

INPUT

1608 F12b

LT1019A-2.5

VOUT

VIN

AIN

–

VREF

LTC1608

AGND

REFCOMP

Figure 12b. Using the LT1019-2.5 as an External Reference

A 7.5k resistor is in series with the output so that it can be

easily overdriven by an external reference or other

circuitry (see Figure 12b). The reference amplifier gains

the voltage at the VREF pin by 1.75 to create the required

internal reference voltage. This provides buffering

between the VREF pin and the high speed capacitive DAC.

The reference amplifier compensation pin (REFCOMP, Pin

4) must be bypassed with a capacitor to ground. The

reference amplifier is stable with capacitors of 22

µF or

greater. Using a 0.1

µFceramicinparallelisrecommended.

The VREF pin can be driven with a DAC or other means

shown in Figure 13. This is useful in applications where the

peak input signal amplitude may vary. The input span of

the ADC can then be adjusted to match the peak input

signal, maximizing the signal-to-noise ratio. The filtering

of the internal LTC1608 reference amplifier will limit

the bandwidth and settling time of this circuit. A settling

time of 20ms should be allowed for after a reference

adjustment.

LTC1608

AIN

ANALOG INPUT

2V TO 2.7V

DIFFERENTIAL

AIN

–

VREF

REFCOMP

AGND

1608 F13

µF

LTC1450

2V TO 2.7V

Figure 13. Driving VREF with a DAC

Figure 14a. CMRR vs Input Frequency

INPUT FREQUENCY (Hz)

10k

100k

1608 G14a

Differential Inputs

The LTC1608 has a unique differential sample-and-hold

circuit that allows rail-to-rail inputs. The ADC will always

convert the difference of AIN+ – AIN– independent of the

common mode voltage (see Figure 15a). The common

mode rejection holds up to extremely high frequencies

(see Figure 14a). The only requirement is that both inputs

can not exceed the AVDD or VSS power supply voltages.

Integral nonlinearity errors (INL) and differential nonlin-

earity errors (DNL) are independent of the common mode

voltage, however, the bipolar zero error (BZE) will vary.

The change in BZE is typically less than 0.1% of the

common mode voltage. Dynamic performance is also

affected by the common mode voltage. THD will degrade

as the inputs approach either power supply rail, from 96dB

with a common mode of 0V to 86dB with a common mode

of 2.5V or – 2.5V.

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