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LTC1608

APPLICATIO S I FOR ATIO

LTC1608

AIN

–

VREF

0V TO

±2.5V

REFCOMP

AGND

1608 F14b

µF

ANALOG INPUT

–

Figure 14b. Selectable 0V to 5V or

±2.5V Input Range

Differential inputs allow greater flexibility for accepting

different input ranges. Figure 14b shows a circuit that

converts a 0V to 5V analog input signal with only an

additional buffer that is not in the signal path.

Full-Scale and Offset Adjustment

Figure 15a shows the ideal input/output characteristics

for the LTC1608. The code transitions occur midway

between successive integer LSB values (i.e., – FS +

0.5LSB, – FS + 1.5LSB, – FS + 2.5LSB,... FS – 1.5LSB,

FS – 0.5LSB). The output is two’s complement binary with

1LSB = FS – (– FS)/65536 = 5V/65536 = 76.3

µV.

In applications where absolute accuracy is important,

offset and full-scale errors can be adjusted to zero. Offset

error must be adjusted before full-scale error. Figure 15b

shows the extra components required for full-scale error

adjustment. Zero offset is achieved by adjusting the offset

applied to the AIN– input. For zero offset error, apply

–38

µV (i.e., –0.5LSB) at AIN+ and adjust the offset at the

AIN– input by varying the output voltage of pin VOUTA from

the LTC1662 until the output code flickers between 0000

0000 0000 0000 and 1111 1111 1111 1111. For full-scale

adjustment, an input voltage of 2.499886V (FS/2 – 1.5LSBs)

is applied to AIN+ and the output voltage of pin VOUTB is

adjusted until the output code flickers between 0111 1111

1111 1110 and 0111 1111 1111 1111.

BOARD LAYOUT AND GROUNDING

Wire wrap boards are not recommended for high resolu-

tion or high speed A/D converters. To obtain the best per-

formance from the LTC1608, a printed circuit board with

ANALOG

INPUT

1608 F15b

80.6k

OFFSET ADJ RANGE:

±0.125%

FULL-SCALE ADJ RANGE:

±0.25%

40.2k

0.1

µF

–5V

1.5M

100

Ω

2.2

µF

AIN

–

VREF

REFCOMP

AGND

LTC1608

LTC1662

CS/LD

SCK

SDI

REF

VOUTA

GND

VCC

VOUTB

Figure 15b. Offset and Full-Scale Adjust Circuit

1608 F15a

011...111

011...110

000...001

000...000

111...111

111...110

100...001

100...000

FS – 1LSB

– (FS – 1LSB)

INPUT VOLTAGE (AIN

+ – A

–)

Figure 15a. LTC1608 Transfer Characteristics

ground plane is required. Layout should ensure that digital

and analog signal lines are separated as much as possible.

Particular care should be taken not to run any digital track

alongside an analog signal track or underneath the ADC.The

analog input should be screened by AGND.

An analog ground plane separate from the logic system

ground should be established under and around the ADC.

Pin 5 to Pin 8 (AGNDs), Pin 10 (ADC’s DGND) and all other

analog grounds should be connected to this single analog

ground point. The REFCOMP bypass capacitor and the

DVDD bypass capacitor should also be connected to this

analog ground plane. No other digital grounds should be

connected to this analog ground plane. Low impedance

analog and digital power supply common returns are

essential to low noise operation of the ADC and the foil

width for these tracks should be as wide as possible. In

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