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LPC804 Datasheet(PDF) 39 Page - NXP Semiconductors

Part # LPC804
Description  32-bit Arm짰 Cortex짰-M0 microcontroller
PDF  81 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC804 Datasheet(HTML) 39 Page - NXP Semiconductors

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LPC804
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet
Rev. 1.3 — 23 March 2018
39 of 81
NXP Semiconductors
LPC804
32-bit Arm Cortex-M0+ microcontroller
11. Thermal characteristics
The average chip junction temperature, Tj (C), can be calculated using the following
equation:
(1)
Tamb = ambient temperature (C),
Rth(j-a) = the package junction-to-ambient thermal resistance (C/W)
PD = sum of internal and I/O power dissipation
The internal power dissipation is the product of IDD and VDD. The I/O power dissipation of
the I/O pins is often small and many times can be negligible. However it can be significant
in some applications.
Table 10.
Thermal resistance
Symbol
Parameter
Conditions
Max/min
Unit
TSSOP20 package
Rth(j-a)
thermal resistance from
junction-to-ambient
JEDEC (4.5 in
 4 in); still air 108  15 %
C/W
single-layer (4.5 in
 3 in); still
air
151
 15 %
C/W
Rth(j-c)
thermal resistance from
junction-to-case
24
 15 %
C/W
TSSOP24 package
Rth(j-a)
thermal resistance from
junction-to-ambient
JEDEC (4.5 in
 4 in); still air 114  15 %
C/W
single-layer (4.5 in
 3 in); still
air
153
 15 %
C/W
Rth(j-c)
thermal resistance from
junction-to-case
31
 15 %
C/W
HVQFN33 package
Rth(j-a)
thermal resistance from
junction-to-ambient
JEDEC (4.5 in
 4 in); still air 42  15 %
C/W
single-layer (4.5 in
 3 in); still
air
114
 15 %
C/W
Rth(j-c)
thermal resistance from
junction-to-case
21
 15 %
C/W
T
j
T
amb
P
D
R
th j
a


+
=



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