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LPC804 Datasheet(PDF) 1 Page - NXP Semiconductors

Part # LPC804
Description  32-bit Arm짰 Cortex짰-M0 microcontroller
PDF  81 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC804 Datasheet(HTML) 1 Page - NXP Semiconductors

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1. General description
The LPC804 are an Arm
Cortex-M0+ based, low-cost 32-bit MCU family operating at CPU
frequencies of up to 15 MHz. The LPC804 supports 32 KB of flash memory and 4 KB of
SRAM.
The peripheral complement of the LPC804 includes a CRC engine, two I2C-bus
interfaces, up to two USARTs, one SPI interface, Capacitive Touch Interface (Cap Touch),
one multi-rate timer, self-wake-up timer, one general purpose 32-bit counter/timer, one
12-bit ADC, one 10-bit DAC, one analog comparator, function-configurable I/O ports
through a switch matrix, an input pattern match engine, Programmable Logic Unit (PLU),
and up to 30 general-purpose I/O pins.
For additional documentation related to the LPC804 parts, see Section 19.
2. Features and benefits
System:
Arm Cortex-M0+ processor (revision r0p1), running at frequencies of up to 15 MHz
with single-cycle multiplier and fast single-cycle I/O port.
Arm Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).
System tick timer.
AHB multilayer matrix.
Serial Wire Debug (SWD) with four break points and two watch points. JTAG
boundary scan (BSDL) supported.
Memory:
Up to 32 KB on-chip EEPROM based flash programming memory.
Code Read Protection (CRP).
4 KB SRAM.
Dual I/O power (LPC804M111JDH24):
Independent supplies on each package side permitting level-shifting signals from
one off-chip voltage domain to another and/or interfacing directly to off-chip
peripherals operating at different supply levels.
The switch matrix provides level shifter functionality to allow up to two selected
signals to be routed from user-selected pins in one voltage domain to selected pins
in the alternate domain. This feature can also be used on a single supply device if
voltage level shifting is not required.
ROM API support:
Boot loader.
LPC804
32-bit Arm® Cortex®-M0+ microcontroller; up to 32 KB flash
and 4 KB SRAM; 12-bit ADC; Comparator; 10-bit DAC;
Capacitive Touch Interface; Programmable Logic Unit
Rev. 1.3 — 23 March 2018
Product data sheet


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