LPC804 datasheet(5/81 Pages) NXP

5 / 81 page

LPC804

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Product data sheet

Rev. 1.3 — 23 March 2018

5 of 81

NXP Semiconductors

LPC804

32-bit Arm Cortex-M0+ microcontroller

5. Marking

The LPC804 HVQFN33 packages have the following top-side marking::

• First line: LPC804M101

• Second line: xxxxxx

• Third line: xxxyywwx[R]x

– yyww: Date code with yy = year and ww = week.

– xR = Boot code version and device revision.

The LPC804 TSSOP20 packages typically have the following top-side marking:

• First line: LPC804M101

• Second line: xxxxxx

• Third line: xxxyywwx[R]x

– yyww: Date code with yy = year and ww = week.

– xR = Boot code version and device revision.

The LPC804 TSSOP24 packages have the following top-side marking::

• First line: LPC804M1y1

– y: 0 or 1

• Second line: xxxxxx

• Third line: xxxyywwx[R]x

– yyww: Date code with yy = year and ww = week.

– xR = Boot code version and device revision.

Fig 1.

TSSOP20 and TSSOP24 package markings

Fig 2.

HVQFN33 package marking

aaa-014766

Terminal 1 index area

aaa-014382

Terminal 1 index area

Table 3.

Device revision table

Revision identifier (R)

Revision description

Initial device revision with Boot ROM version 13.1

LPC804 Datasheet(PDF) 5 Page - NXP Semiconductors