FUSB301

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9

Table 7. CONTROL

Address: 03h

Reset Value: 0×XX00_X011

Type: Read/Write

Bit #

Name

Size (Bits)

Description

7:6

Reserved

2

Do Not Use

5:4

DRPTOGGLE

2

Selects different timing for Dual Role Port Toggle between Unattached. Sink

State and Unattached.SOURCE State.

00: 35 ms min. in Unattached.Sink and 15 ms min. In Unattached.SOURCE

01: 30 ms min. In Unattached.Sink and 20 ms min. In Unattached.SOURCE

10: 25 ms min. In Unattached.Sink and 25 ms min. In Unattached.SOURCE

11: 20 ms min. In Unattached.Sink and 30 ms min. In Unattached.SOURCE

3

Reserved

1

Do Not Use

2:1

HOST_CUR

[1:0]

2

1: Controls the pull−up current when device enabled as a Source

00: No Current

01: 80 mA − Default USB Power

10: 180 mA − Medium Current Mode: 1.5 A

11: 330 mA − High Current Mode: 3 A

0

INT_MASK

1

1: Global interrupt mask to mask all interrupts

Address: 04h

Reset Value: 0×XXXX_0000

Type: Write/Clear

Bit #

Name

Size (Bits)

Description

7:4

Reserved

4

Do Not Use

3

UNATT_SNK

(Note 7)

1

1: Put device in Unattached.Sink state as defined in the Type C spec

2

UNATT_SRC

1

1: Put device in Unattached.Source state as defined in the Type C spec

1

DISABLED

(Note 8)

1

1: Put device in Disabled state as defined in the Type C spec

0

ERROR_REC

1

1: Put device in ErrorRecovery state as defined in the Type C spec

is UNATT_SRC, last is UNATT_SNK. The highest priority bit will take precedence and all other bits will be cleared automatically.

7. Wait 2 ms between Modes = Sink and Manual = UNATT_SNK writes.

8. The DISABLED bit must be manually cleared.

Table 9. RESET

Address: 05h

Reset Value: 0×XXXX_XXX0

Type: Write/Clear

Bit #

Name

Size (Bits)

Description

7:6

Reserved

7

Do Not Use

0

SW_RES

1

1: Reset the system and I2C Register.

Table 10. MASK

Address: 10h

Reset Value: 0×XXXX_0000

Type: Read/Write

Bit #

Name

Size (Bits)

Description

7:4

Reserved

4

Do Not Use

3

M_ACC_CH

1

1: Mask a change from Accessory Present to Attached Accessory

2

M_BC_LVL

1

1: Mask a change in I_BC_LVL interrupt bit