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AD5313R Datasheet(PDF) 17 Page - Analog Devices |
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AD5313R Datasheet(HTML) 17 Page - Analog Devices |
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17 / 26 page ![]() Data Sheet AD5313R Rev. B | Page 17 of 26 5B THEORY OF OPERATION 20B DIGITAL-TO-ANALOG CONVERTER (DAC) The AD5313R is a dual 10-bit, serial input, voltage output DAC with an internal reference. The part operates from supply voltages of 2.7 V to 5.5 V. Data is written to the AD5313R in a 24-bit word format via a 3-wire serial interface. The AD5313R incorporates a power-on reset circuit to ensure that the DAC output powers up to a known output state. The device also has a software power-down mode that reduces the typical current consumption to 4 µA. 21B TRANSFER FUNCTION The internal reference is on by default. To use an external reference, only a nonreference option is available. Because the input coding to the DAC is straight binary, the ideal output voltage when using an external reference is given by × = N REF OUT D Gain V V 2 where: Gain is the output amplifier gain and is set to 1 by default. It can be set to ×1 or ×2 using the gain select pin. When the GAIN pin is tied to GND, both DAC outputs have a span from 0 V to VREF. If the GAIN pin is tied to VLOGIC, both DACs output a span of 0 V to 2 × VREF. D is the decimal equivalent of the binary code that is loaded to the DAC register as follows: 0 to 1,024 for the 10-bit device. N is the DAC resolution. 22B DAC ARCHITECTURE The DAC architecture consists of a string DAC followed by an output amplifier. Figure 38 shows a block diagram of the DAC architecture. Figure 38. Single DAC Channel Architecture Block Diagram The resistor string structure is shown in Figure 39. It is a string of resistors, each of Value R. The code loaded to the DAC register determines the node on the string where the voltage is to be tapped off and fed into the output amplifier. The voltage is tapped off by closing one of the switches connecting the string to the amplifier. Because it is a string of resistors, it is guaranteed monotonic. Figure 39. Resistor String Structure 44B Internal Reference The AD5313R on-chip reference is on at power-up but can be disabled via a write to a control register. See the Internal Reference Setup section for details. The AD5313R has a 2.5 V, 2 ppm/°C reference, giving a full- scale output of 2.5 V or 5 V, depending on the state of the GAIN pin. The internal reference associated with the device is available at the VREF pin. This buffered reference is capable of driving external loads of up to 10 mA. 45B Output Amplifiers The output buffer amplifier can generate rail-to-rail voltages on its output, which gives an output range of 0 V to VDD. The actual range depends on the value of VREF, the GAIN pin, the offset error, and the gain error. The GAIN pin selects the gain of the output, as follows: • If the GAIN pin is tied to GND, both DAC outputs have a gain of 1, and the output range is 0 V to VREF. • If the GAIN pin is tied to VLOGIC, both DAC outputs have a gain of 2, and the output range is 0 V to 2 × VREF. These amplifiers are capable of driving a load of 1 kΩ in parallel with 2 nF to GND. The slew rate is 0.8 V/µs with a ¼ to ¾ scale settling time of 5 µs. INPUT REGISTER 2.5V REF DAC REGISTER RESISTOR STRING REF (+) VREF GND REF (–) VOUTX GAIN (GAIN = 1 OR 2) R R R R R TO OUTPUT AMPLIFIER VREF |
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