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DM9161AE Datasheet(PDF) 8 Page - List of Unclassifed Manufacturers

Part # DM9161AE
Description  10/100 MBPS FAST ETHEMET PHYSICAL LAYER SINGLE CHIP TRANSCEIVER
PDF  45 Pages
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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DM9161AE Datasheet(HTML) 8 Page - List of Unclassifed Manufacturers

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Preliminary
8
Version: DM9161A-DS-P04
Jan.19, 2005
5.2 Media Interface, 4 pins
Pin No.
Pin Name
I/O
Description
3,4
RX+
RX-
I
Differential Receive Pair
Differential data is received from the media
7,8
TX+
TX-
O Differential Transmit Pair/PECL Transmit Pair
Differential data is transmitted to the media in TP mode
5.3 LED Interface, 3 pins
Pin No.
Pin Name
I/O
Description
11
LED0
/OP0
O,
LI
(U)
LED Driver output 0
OP0: (power up reset latch input)
This pin is used to control the forced or advertised operating mode of the
DM9161A according to the Table A. The value is latched into the
DM9161A registers at power-up/reset
12
LED1
/OP1
O,
LI
(U)
LED Driver output 1
OP1: (power up reset latch input)
This pin is used to control the forced or advertised operating mode of the
DM9161A according to the Table A. The value is latched into the
DM9161A registers at power-up/reset
13
LED2
/OP2
O,
LI
(U)
LED Driver output 2
OP2: (power up reset latch input)
This pin is used to control the forced or advertised operating mode of the
DM9161A according to the Table A. The value is latched into the
DM9161A registers at power-up/reset
5.4 Mode, 3 pins
Pin No.
Pin Name
I/O
Description
10
PWRDWN
I
Power Down Control
Asserted high to force the DM9161A into power down mode. When in
power down mode, most of the DM9161A circuit block’s power is turned
off, only the MII management interface (MDC, MDIO) logic is available
(the PHY should respond to management transactions and should not
generate spurious signals on the MII)). To leave power down mode, the
DM9161A needs the hardware or software reset with the PWRDWN pin
low
14
CABLESTS
/LINKSTS
O,
LI
(D)
Cable Status or Link Status
This pin is used to indicate the status of the cable connection when
power up reset latch low (Default)
0 = Without cable connection
1 = With cable connection
This pin is used to indicate the status of the Link connection when power
up reset latch high
0 = With link
1 = Without link
39
DISMDIX
I
(D)
Auto MDIX Control
1: Disable auto mode
0: Enable auto MDI/MDIX mode
5.5 Bias and Clock, 4 pins



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