TS34118CS28

Taiwan Semiconductor

9

Version: E1608

APPLICATION INFORMATION (CONTINUE)

Background Noise Monitors

The purpose of the background noise monitors is to distinguish speech (which consists of bursts) from background

noise (a relatively constant signal level). There are two background noise monitors-one for the receive path and

one for the transmit path. Referring to Figure 4, the receive background noise monitor is operated on by the RLI1-

PLO1 level detector, while the transmit background noise monitor is operated on by the TLI2-TLO2 level detector.

They monitor the background noise by storing a dc voltage representative of the respective noise levels in

capacitors at CPR and CPT. The voltages at these pins have slow rise times (determined by the external RC), but

fast decay times. If the signal at RLI1 (or TLI2) changes slowly, the voltage at CPR (or CPT) will remain more

positive than the voltage at the non-inverting input of the monitor’s output comparator. When speech is present, the

voltage on the non-inverting input of the comparator will rise quicker than the voltage at the inverting input (due to

the burst characteristic of speech), causing its output to change. This output is sensed by the Attenuator Control

Block. The 36mV offset at the comparator’s input keeps the comparator from changing state unless the speech

level exceeds the background noise by≈4.0dB. The time constant of the external RC (≈4.7 seconds) determines the

response time to background noise variations.

Dial Tone Detectors

The dial tone detector is a comparator with one side connected to the receive input (RXI) and the other input

connected to VB with a 15mV offset (see Figure 5). If the circuit is in the receive mode, and the incoming signal is

greater than 15mV (10mVrms), the comparator’s output will change, disabling the receive idle mode. The receive

attenuator will then be at a setting determined solely by the volume control.

The purpose of this circuit is to prevent the dial tone (which would be considered as continuous noise) from fading

away as the circuit would have the tendency to switch to the idle mode. By disabling the receive idle mode, the dial

tone remains at the normally expected full level.

Figure 5. Dial Tone Detector

Attenuator Control Block

The Attenuator Control Block has the seven inputs described above:

-The output of the comparator operated by RLO2 and TLO2 (microphone/speaker side) - designated C1.

-The output of the comparator operated by RLO1 and TLO1 (TIP/Ring side) – designated C2.

-The output of the transmit background noise monitor – designated C3.

-The output of the receive background noise monitor

-designated C4.

-The volume control.

-The dial tone detector.

-The AGC circuit.

The single output of the Control Block controls the two attenuators. The effect of C1-C4 is as follows: