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IRMCF188TY Datasheet(PDF) 12 Page - International Rectifier |
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IRMCF188TY Datasheet(HTML) 12 Page - International Rectifier |
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12 / 38 page  IRMCF188 12 www.irf.com © 2014 International Rectifier March 10, 2017 Fault GATEKILL Input, upon assertion this negates all six PWM signals, active low, internally pulled up by 70kΩ PFCGKILL Input, upon assertion, this negates PFCPWM signal, active low, internally pulled up by 70kΩ 4.3 Analog Interface Group AVSS Analog power return, (analog internal 1.8V power is shared with VDDCAP) AREF 0.6V buffered output CMEXT Unbuffered 0.6V, input to the AREF buffer, capacitor needs to be connected. OP1+ Input, Operational amplifier positive input for application sensing OP1- Input, Operational amplifier negative input for application sensing OP1O Output, Operational amplifier output for application sensing OP2+ Input, Operational amplifier positive input for application sensing OP2- Input, Operational amplifier negative input for application sensing OP2O Output, Operational amplifier output for application sensing OP3+ Input, Operational amplifier positive input for application sensing OP3- Input, Operational amplifier negative input for application sensing OP3O Output, Operational amplifier output for application sensing VDCBUS Input, Analog input channel (0 – 1.2V), allocated for DC bus voltage input AIN1 Input, Analog input channel 1 (0 – 1.2V), needs to be pulled down to AVSS if unused AIN2 Input, Analog input channel 2 (0 – 1.2V), needs to be pulled down to AVSS if unused AIN3 Input, Analog input channel 3 (0 – 1.2V), needs to be pulled down to AVSS if unused AIN4 Input, Analog input channel 4 (0 – 1.2V), needs to be pulled down to AVSS if unused ADCH Input, Analog input channel dedicated for A/D compensation (0 – 1.2V), needs to be pulled down to AVSS if unused ADCL Input, Analog input channel dedicated for A/D compensation (0 – 1.2V), internally biased to 0.6V, see Figure 23 for internal structure Analog Channel Leg Shunt Mode Single Shunt Mode Pin number(s) OP1 PFC Current AC Voltage 19, 20, 21 OP2 Motor U Phase Current Motor Shunt Current 28, 29, 30 OP3 Motor V Phase Current PFC Current 34, 35, 36 AIN1 AC Voltage Unallocated 23 Table 1. Analog channel sensing functions in Leg and Single Shunt Modes 4.4 Power Interface Group VDD1 Digital power (3.3V) VDDCAP Internal 1.8V output, requires capacitors to the pin. Shared with analog power pad internally Note: The internal 1.8V supply is not designed to power any external circuits or devices. Only capacitors should be connected to this pin. VSS Digital common 4.5 Test Interface Group P5.2/TMS JTAG test mode input or input digital port |
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