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TH08 Datasheet

Table 3. I2C Interface Specifications1 (Continued)

1.9 ≤ VDD ≤ 3.6 V; TA = –40 to +125 °C unless otherwise noted.

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

Start Setup Time

tSTS

0.6

—

µs

Stop Setup Time

tSPS

0.6

—

µs

Bus Free Time

tBUF

Between Stop and Start

1.3

—

µs

SDA Setup Time

tDS

100

—

SDA Hold Time

tDH

100

—

SDA Valid Time

tVD;DAT

From SCL low to data valid

—

0.9

µs

SDA Acknowledge Valid Time

tVD;ACK

From SCL low to data valid

—

0.9

µs

Suppressed Pulse Width3

tSPS

—

Notes:

1. All values are referenced to VIL and/or VIH.

2. Depending on the conversion command, the TH08 may hold the master during the conversion (clock stretch). At

above 100 kHz SCL, the TH08 may also hold the master briefly for user register and device ID transactions. At the

highest I2C speed of 400 kHz the stretching will be <10 µs.

3. Pulses up to and including 50 ns will be suppressed.

1/fSCL

tSKH

tSP

tSKL

SCL

tBUF

tSTH

tDS

tDH

tSPS

SDA

R/W

ACK

Start Bit

Stop Bit

tSTS

tVD : ACK

Figure 1. I2C Interface Timing Diagram

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