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AM5728 Datasheet(PDF) 320 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 320 Page - Texas Instruments |
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320 / 415 page ![]() mmc1_clk mmc1_cmd mmc1_dat[3:0] HSSD1 HSSD2L HSSD2H HSSD5 HSSD6 HSSD5 HSSD6 vayu_mmc1_04 mmc1_clk mmc1_cmd mmc1_dat[3:0] HSSD1 HSSD2L HSSD3 HSSD4 HSSD7 HSSD8 vayu_mmc1_03 HSSD2H 320 AM5729, AM5728, AM5726 SPRS953F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-92. Timing Requirements for MMC1 - SD Card High Speed Mode (continued) NO. PARAMETER DESCRIPTION MIN MAX UNIT HSSD8 th(clkH-dV) Hold time, mmc1_dat[3:0] valid after mmc1_clk rising clock edge 2.6 ns Table 7-93. Switching Characteristics for MMC1 - SD Card High Speed Mode NO. PARAMETER DESCRIPTION MIN MAX UNIT HSSD1 fop(clk) Operating frequency, mmc1_clk 48 MHz HSSD2H tw(clkH) Pulse duration, mmc1_clk high 0.5*P- 0.185 (1) ns HSSD2L tw(clkL) Pulse duration, mmc1_clk low 0.5*P- 0.185 (1) ns HSSD5 td(clkL-cmdV) Delay time, mmc1_clk falling clock edge to mmc1_cmd transition -7.6 3.6 ns HSSD6 td(clkL-dV) Delay time, mmc1_clk falling clock edge to mmc1_dat[3:0] transition -7.6 3.6 ns (1) P = output mmc1_clk period in ns Figure 7-62. MMC/SD/SDIO in - High Speed - Receiver Mode Figure 7-63. MMC/SD/SDIO in - High Speed - Transmitter Mode 7.23.1.3 SDR12, 4-bit data, half-cycle Table 7-94 and Table 7-95 present Timing requirements and Switching characteristics for MMC1 - SDR12 in receiver and transmitter mode(see Figure 7-64 and Figure 7-65). Table 7-94. Timing Requirements for MMC1 - SD Card SDR12 Mode NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT SDR125 tsu(cmdV-clkH) Setup time, mmc1_cmd valid before mmc1_clk rising clock edge 25.99 ns SDR126 th(clkH-cmdV) Hold time, mmc1_cmd valid after mmc1_clk rising clock edge Pad Loopbac k Clock 1.6 ns Internal Loopbac k Clock 1.6 ns |
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